Electrical degradation mechanisms of nanoscale charge trap flash memories due to trapped charge in the oxide layer

Kyoung Wook Koh; Dong Hun Kim; Ju Tae Ryu; Tae Whan Kim; Keon-Ho Yoo

doi:10.3938/jkps.67.533

Electrical degradation mechanisms of nanoscale charge trap flash memories due to trapped charge in the oxide layer

Journal of the Korean Physical Society ◽

10.3938/jkps.67.533 ◽

2015 ◽

Vol 67 (3) ◽

pp. 533-536

Author(s):

Kyoung Wook Koh ◽

Dong Hun Kim ◽

Ju Tae Ryu ◽

Tae Whan Kim ◽

Keon-Ho Yoo

Keyword(s):

Oxide Layer ◽

Degradation Mechanisms ◽

Flash Memories ◽

Charge Trap ◽

Electrical Degradation ◽

Trapped Charge

Download Full-text

Lateral Trapped-Charge Profiling Based on the Extraction of the Flatband Voltage by Using the Optical Substrate Current in Nitride-Based Charge-Trap Flash Memories

IEEE Transactions on Electron Devices ◽

10.1109/ted.2009.2026320 ◽

2009 ◽

Vol 56 (9) ◽

pp. 2034-2044

Author(s):

Kang-Seob Roh ◽

Sungwook Park ◽

Dae Hwan Kim ◽

Dong Myong Kim

Keyword(s):

Flash Memories ◽

Charge Trap ◽

Substrate Current ◽

Flatband Voltage ◽

Trapped Charge

Download Full-text

Adaptive Artificial Neural Network-Coupled LDPC ECC as Universal Solution for 3-D and 2-D, Charge-Trap and Floating-Gate NAND Flash Memories

IEEE Journal of Solid-State Circuits ◽

10.1109/jssc.2018.2884949 ◽

2019 ◽

Vol 54 (3) ◽

pp. 745-754 ◽

Cited By ~ 3

Author(s):

Toshiki Nakamura ◽

Yoshiaki Deguchi ◽

Ken Takeuchi

Keyword(s):

Neural Network ◽

Artificial Neural Network ◽

Floating Gate ◽

Nand Flash ◽

Flash Memories ◽

Charge Trap ◽

Universal Solution ◽

Artificial Neural

Download Full-text

9.1x Error acceptable adaptive artificial neural network coupled LDPC ECC for charge-trap and floating-gate 3D-NAND flash memories

2018 IEEE Custom Integrated Circuits Conference (CICC) ◽

10.1109/cicc.2018.8357064 ◽

2018 ◽

Cited By ~ 3

Author(s):

Toshiki Nakamura ◽

Yoshiaki Deguchi ◽

Ken Takeuchi

Keyword(s):

Neural Network ◽

Artificial Neural Network ◽

Floating Gate ◽

Nand Flash ◽

Flash Memories ◽

Charge Trap ◽

Artificial Neural

Download Full-text

Session 19 - CMOS and Interconnect Reliability - Process Induced and Electrical Degradation in Flash Memories and CMOS Circuits

IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004. ◽

10.1109/iedm.2004.1419190 ◽

2004 ◽

Keyword(s):

Cmos Circuits ◽

Flash Memories ◽

Electrical Degradation ◽

Interconnect Reliability

Download Full-text

CMOS and interconnect reliability process and electrical degradation in flash memories and performance boosted CMOS devices

IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest. ◽

10.1109/iedm.2005.1609401 ◽

2006 ◽

Author(s):

A. Visconti ◽

W. Tonti

Keyword(s):

Flash Memories ◽

Electrical Degradation ◽

Interconnect Reliability ◽

And Performance

Download Full-text

Program/Erase Model of Nitride-Based NAND-Type Charge Trap Flash Memories

Japanese Journal of Applied Physics ◽

10.1143/jjap.49.084301 ◽

2010 ◽

Vol 49 (8) ◽

pp. 084301 ◽

Cited By ~ 4

Author(s):

Doo-Hyun Kim ◽

Seongjae Cho ◽

Dong Hua Li ◽

Jang-Gn Yun ◽

Jung Hoon Lee ◽

...

Keyword(s):

Flash Memories ◽

Charge Trap

Download Full-text

Improved electrical properties of charge trap flash memories having a patterned surface in a Si3N4 trap layer

10.7567/ssdm.2011.p-4-2 ◽

2011 ◽

Author(s):

H. M. An ◽

J. W. Yang ◽

H. D. Kim ◽

J. W. Son ◽

W. J. Cho ◽

...

Keyword(s):

Electrical Properties ◽

Flash Memories ◽

Charge Trap ◽

Patterned Surface

Download Full-text

Novel Device Structures for Charge Trap Flash Memories

2006 8th International Conference on Solid-State and Integrated Circuit Technology Proceedings ◽

10.1109/icsict.2006.306475 ◽

2006 ◽

Author(s):

Byung-gook Park ◽

Il Park ◽

Jung-hoon Lee ◽

Byung Choi

Keyword(s):

Flash Memories ◽

Charge Trap ◽

Novel Device ◽

Device Structures

Download Full-text

Degradation Mechanisms of the Program Characteristics of 10 nm NAND Flash Memories Due to Cell-to-Cell Interference

Journal of Nanoscience and Nanotechnology ◽

10.1166/jnn.2013.7613 ◽

2013 ◽

Vol 13 (9) ◽

pp. 6420-6423

Author(s):

Ju Tae Ryu ◽

Tae Whan Kim

Keyword(s):

Nand Flash ◽

Degradation Mechanisms ◽

Flash Memories ◽

Program Characteristics

Download Full-text

A comprehensive study of degradation behavior of select transistors in the Charge Trap Flash memories

2010 IEEE International Memory Workshop ◽

10.1109/imw.2010.5488386 ◽

2010 ◽

Cited By ~ 1

Author(s):

Byeong-In Choe ◽

Sung-Il Chang ◽

Changseok Kang ◽

Jintaek Park ◽

Joohyuck Chung ◽

...

Keyword(s):

Degradation Behavior ◽

Flash Memories ◽

Charge Trap ◽

Comprehensive Study

Download Full-text