Lateral Trapped-Charge Profiling Based on the Extraction of the Flatband Voltage by Using the Optical Substrate Current in Nitride-Based Charge-Trap Flash Memories

2009 ◽  
Vol 56 (9) ◽  
pp. 2034-2044
Author(s):  
Kang-Seob Roh ◽  
Sungwook Park ◽  
Dae Hwan Kim ◽  
Dong Myong Kim
Keyword(s):  
Flash Memories ◽  
Charge Trap ◽  
Substrate Current ◽  
Flatband Voltage ◽  
Trapped Charge

Electrical degradation mechanisms of nanoscale charge trap flash memories due to trapped charge in the oxide layer

2015 ◽  
Vol 67 (3) ◽  
pp. 533-536
Author(s):  
Kyoung Wook Koh ◽  
Dong Hun Kim ◽  
Ju Tae Ryu ◽  
Tae Whan Kim ◽  
Keon-Ho Yoo
Keyword(s):  
Oxide Layer ◽  
Degradation Mechanisms ◽  
Flash Memories ◽  
Charge Trap ◽  
Electrical Degradation ◽  
Trapped Charge

Program/Erase Model of Nitride-Based NAND-Type Charge Trap Flash Memories

2010 ◽  
Vol 49 (8) ◽  
pp. 084301 ◽  
Author(s):  
Doo-Hyun Kim ◽  
Seongjae Cho ◽  
Dong Hua Li ◽  
Jang-Gn Yun ◽  
Jung Hoon Lee ◽  
...  
Keyword(s):  
Flash Memories ◽  
Charge Trap

Improved electrical properties of charge trap flash memories having a patterned surface in a Si3N4 trap layer

2011 ◽  
Author(s):  
H. M. An ◽  
J. W. Yang ◽  
H. D. Kim ◽  
J. W. Son ◽  
W. J. Cho ◽  
...  
Keyword(s):  
Electrical Properties ◽  
Flash Memories ◽  
Charge Trap ◽  
Patterned Surface

A comprehensive study of degradation behavior of select transistors in the Charge Trap Flash memories

2010 ◽  
Author(s):  
Byeong-In Choe ◽  
Sung-Il Chang ◽  
Changseok Kang ◽  
Jintaek Park ◽  
Joohyuck Chung ◽  
...  
Keyword(s):  
Degradation Behavior ◽  
Flash Memories ◽  
Charge Trap ◽  
Comprehensive Study

scholarly journals Temperature Impacts on Endurance and Read Disturbs in Charge-Trap 3D NAND Flash Memories

Micromachines ◽  
2021 ◽  
Vol 12 (10) ◽  
pp. 1152
Author(s):  
Fei Chen ◽  
Bo Chen ◽  
Hongzhe Lin ◽  
Yachen Kong ◽  
Xin Liu ◽  
...  
Keyword(s):  
Flash Memory ◽  
Temperature Effects ◽  
Memory Systems ◽  
Nand Flash ◽  
Nand Flash Memory ◽  
Flash Memories ◽  
Charge Trap ◽  
Fundamental Factor ◽  
Temperature Impacts ◽  
Raw Bit Error Rate

Temperature effects should be well considered when designing flash-based memory systems, because they are a fundamental factor that affect both the performance and the reliability of NAND flash memories. In this work, aiming to comprehensively understanding the temperature effects on 3D NAND flash memory, triple-level-cell (TLC) mode charge-trap (CT) 3D NAND flash memory chips were characterized systematically in a wide temperature range (−30~70 °C), by focusing on the raw bit error rate (RBER) degradation during program/erase (P/E) cycling (endurance) and frequent reading (read disturb). It was observed that (1) the program time showed strong dependences on the temperature and P/E cycles, which could be well fitted by the proposed temperature-dependent cycling program time (TCPT) model; (2) RBER could be suppressed at higher temperatures, while its degradation weakly depended on the temperature, indicating that high-temperature operations would not accelerate the memory cells’ degradation; (3) read disturbs were much more serious at low temperatures, while it helped to recover a part of RBER at high temperatures.

LAEPS: LDPC LLR Adaptive Estimation Based on Pattern Set Distribution Variation in 3D Charge Trap NAND Flash Memories

2021 ◽  
Author(s):  
Qianhui Li ◽  
Yiyang Jiang ◽  
Qi Wang ◽  
Liu Yang ◽  
Zexia Wang ◽  
...  
Keyword(s):  
Adaptive Estimation ◽  
Nand Flash ◽  
Flash Memories ◽  
Charge Trap
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