scholarly journals An Improved 4H-SiC MESFET with a Partially Low Doped Channel

Micromachines ◽  
2019 ◽  
Vol 10 (9) ◽  
pp. 555 ◽  
Author(s):  
Hujun Jia ◽  
Yibo Tong ◽  
Tao Li ◽  
Shunwei Zhu ◽  
Yuan Liang ◽  
...  
Keyword(s):  
Threshold Voltage ◽  
High Power ◽  
Field Effect ◽  
Doping Concentration ◽  
Field Effect Transistor ◽  
Saturation Current ◽  
Absolute Value ◽  
Power Added Efficiency ◽  
Effect Transistor ◽  
The Absolute

An improved 4H-SiC metal semiconductor field effect transistor (MESFET) based on the double-recessed MESFET (DR-MESFET) for high power added efficiency (PAE) is designed and simulated in this paper and its mechanism is explored by co-simulation of ADS and ISE-TCAD software. This structure has a partially low doped channel (PLDC) under the gate, which increases the PAE of the device by decreasing the absolute value of the threshold voltage (Vt), gate-source capacitance (Cgs) and saturation current (Id). The simulated results show that with the increase of H, the PAE of the device increases and then decreases when the value of NPLDC is low enough. The doping concentration and thickness of the PLDC are respectively optimized to be NPLDC = 1 × 1015 cm−3 and H = 0.15 μm to obtain the best PAE. The maximum PAE obtained from the PLDC-MESFET is 43.67%, while the PAE of the DR-MESFET is 23.43%; the optimized PAE is increased by 86.38%.

scholarly journals An Improved UU-MESFET with High Power Added Efficiency

Micromachines ◽  
2018 ◽  
Vol 9 (11) ◽  
pp. 573 ◽  
Author(s):  
Hujun Jia ◽  
Mei Hu ◽  
Shunwei Zhu
Keyword(s):  
Breakdown Voltage ◽  
Threshold Voltage ◽  
High Power ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Drain Current ◽  
Power Added Efficiency ◽  
Effect Transistor ◽  
The Relationship

An improved ultrahigh upper gate 4H-SiC metal semiconductor field effect transistor (IUU-MESFET) is proposed in this paper. The structure is obtained by modifying the ultrahigh upper gate height h of the ultrahigh upper gate 4H-SiC metal semiconductor field effect transistor (UU-MESFET) structure, and the h is 0.1 μm and 0.2 μm for the IUU-MESFET and UU-MESFET, respectively. Compared with the UU-MESFET, the IUU-MESFET structure has a greater threshold voltage and trans-conductance, and smaller breakdown voltage and saturation drain current, and when the ultrahigh upper gate height h is 0.1 μm, the relationship between these parameters is balanced, so as to solve the contradictory relationship that these parameters cannot be improved simultaneously. Therefore, the power added efficiency (PAE) of the IUU-MESFET structure is increased from 60.16% to 70.99% compared with the UU-MESFET, and advanced by 18%.

scholarly journals Improved DRUS 4H-SiC MESFET with High Power Added Efficiency

Micromachines ◽  
2019 ◽  
Vol 11 (1) ◽  
pp. 35
Author(s):  
Hujun Jia ◽  
Yuan Liang ◽  
Tao Li ◽  
Yibo Tong ◽  
Shunwei Zhu ◽  
...  
Keyword(s):  
Breakdown Voltage ◽  
High Power ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Space Region ◽  
Saturation Current ◽  
Power Added Efficiency ◽  
Acceptable Range ◽  
Effect Transistor

A 4H-SiC metal semiconductor field effect transistor (MESFET) with layered doping and undoped space regions (LDUS-MESFET) is proposed and simulated by ADS and ISE-TCAD software in this paper. The structure (LDUS-MESFET) introduced layered doping under the lower gate of the channel, while optimizing the thickness of the undoped region. Compared with the double-recessed 4H-SiC MESFET with partly undoped space region (DRUS-MESFET), the power added efficiency of the LDUS-MESFET is increased by 85.8%, and the saturation current is increased by 27.4%. Although the breakdown voltage of the device has decreased, the decrease is within an acceptable range. Meanwhile, the LDUS-MESFET has a smaller gate-source capacitance and a large transconductance. Therefore, the LDUS-MESFET can better balance DC and AC characteristics and improve power added efficiency (PAE).

scholarly journals Improved MRD 4H-SiC MESFET with High Power Added Efficiency

Micromachines ◽  
2019 ◽  
Vol 10 (7) ◽  
pp. 479 ◽  
Author(s):  
Shunwei Zhu ◽  
Hujun Jia ◽  
Xingyu Wang ◽  
Yuan Liang ◽  
Yibo Tong ◽  
...  
Keyword(s):  
Radio Frequency ◽  
Buffer Layer ◽  
High Power ◽  
Computer Aided Design ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Design System ◽  
Power Added Efficiency ◽  
Effect Transistor ◽  
Rf Performance

An improved multi-recessed double-recessed p-buffer layer 4H–SiC metal semiconductor field effect transistor (IMRD 4H-SiC MESFET) with high power added efficiency is proposed and studied by co-simulation of advanced design system (ADS) and technology computer aided design (TCAD) Sentaurus software in this paper. Based on multi-recessed double-recessed p-buffer layer 4H–SiC metal semiconductor field effect transistor (MRD 4H-SiC MESFET), the recessed area of MRD MESFET on both sides of the gate is optimized, the direct current (DC), radio frequency (RF) parameters and efficiency of the device is balanced, and the IMRD MESFET with a best power-added efficiency (PAE) is finally obtained. The results show that the PAE of the IMRD MESFET is 68.33%, which is 28.66% higher than the MRD MESFET, and DC and RF performance have not dropped significantly. Compared with the MRD MESFET, the IMRD MESFET has a broader prospect in the field of microwave radio frequency.

scholarly journals Silicon Field Effect Transistor as the Nonlinear Detector for Terahertz Autocorellators

Sensors ◽  
2018 ◽  
Vol 18 (11) ◽  
pp. 3735 ◽  
Author(s):  
Kęstutis Ikamas ◽  
Ignas Nevinskas ◽  
Arūnas Krotkus ◽  
Alvydas Lisauskas
Keyword(s):  
Threshold Voltage ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Cryogenic Cooling ◽  
Thz Radiation ◽  
Gate Bias ◽  
Large Signal ◽  
Wide Range ◽  
Effect Transistor ◽  
Thz Power

We demonstrate that the rectifying field effect transistor, biased to the subthreshold regime, in a large signal regime exhibits a super-linear response to the incident terahertz (THz) power. This phenomenon can be exploited in a variety of experiments which exploit a nonlinear response, such as nonlinear autocorrelation measurements, for direct assessment of intrinsic response time using a pump-probe configuration or for indirect calibration of the oscillating voltage amplitude, which is delivered to the device. For these purposes, we employ a broadband bow-tie antenna coupled Si CMOS field-effect-transistor-based THz detector (TeraFET) in a nonlinear autocorrelation experiment performed with picoseconds-scale pulsed THz radiation. We have found that, in a wide range of gate bias (above the threshold voltage V th = 445 mV), the detected signal follows linearly to the emitted THz power. For gate bias below the threshold voltage (at 350 mV and below), the detected signal increases in a super-linear manner. A combination of these response regimes allows for performing nonlinear autocorrelation measurements with a single device and avoiding cryogenic cooling.

scholarly journals The impact of channel fin width on electrical characteristics of Si-FinFET

2022 ◽  
Vol 12 (1) ◽  
pp. 201
Author(s):  
Yousif Atalla ◽  
Yasir Hashim ◽  
Abdul Nasir Abd. Ghafar
Keyword(s):  
Threshold Voltage ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Environmental Temperature ◽  
Simulation Tool ◽  
Electrical Characteristics ◽  
Working Temperature ◽  
Effect Transistor ◽  
The Impact ◽  
The Ideal

<span>This paper studies the impact of fin width of channel on temperature and electrical characteristics of fin field-effect transistor (FinFET). The simulation tool multi-gate field effect transistor (MuGFET) has been used to examine the FinFET characteristics. Transfer characteristics with various temperatures and channel fin width (W<sub>F</sub>=5, 10, 20, 40, and 80 nm) are at first simulated in this study. The results show that the increasing of environmental temperature tends to increase threshold voltage, while the subthreshold swing (SS) and drain-induced barrier lowering (DIBL) rise with rising working temperature. Also, the threshold voltage decreases with increasing channel fin width of transistor, while the SS and DIBL increase with increasing channel fin width of transistor, at minimum channel fin width, the SS is very near to the best and ideal then its value grows and going far from the ideal value with increasing channel fin width. So, according to these conditions, the minimum value as possible of fin width is the preferable one for FinFET with better electrical characteristics.</span>

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