Interface Passivation in Amorphous Silicon TFTs by Various Gate Dielectric Materials

1987 ◽  
Vol 95 ◽  
Author(s):  
R. C. Fryea ◽  
C. C. Wong ◽  
C. Kornfeld

AbstractWe have used photothermal deflection spectroscopy to examine deep gap absorption in amorphous silicon films deposited on silicon oxide and silicon nitride. Variations in the interface state density deduced from PDS correlate well with the performance characteristics of thin-film transistors. We have demonstrated processes which degrade the interfacial abruptness also increase the interface state density. In transistors this leads to a degradation in device stability. We found devices with oxide gates to be more stable and show lower interface state density than devices with nitride gates for a specific set of deposition conditions. The correspondence between deep gap absorption and transistor characteristics shows that PDS is a valuable technique for characterizing and optimizing fabrication processes.

2019 ◽  
Vol 40 (2) ◽  
pp. 174-176
Author(s):  
Yi-He Tsai ◽  
Chen-Han Chou ◽  
Yun-Yan Chung ◽  
Wen-Kuan Yeh ◽  
Yu-Hsien Lin ◽  
...  

2020 ◽  
Vol 1004 ◽  
pp. 535-540
Author(s):  
Min Who Lim ◽  
Tomasz Sledziewski ◽  
Mathias Rommel ◽  
Tobias Erlbacher ◽  
Hong Ki Kim ◽  
...  

In this work, the influence of pre-deposition interfacial oxidation or post-deposition interface nitridation on the performance of 4H-SiC MOS capacitors was investigated. The gate oxide was deposited by LPCVD using TEOS as a precursor. Interface breakdown strength was derived from leakage current and Time-Zero Dielectric Breakdown characteristics whereas interface quality was assessed by the determination of interface state density from the comparison of quasi-static and high frequency capacitance-voltage characteristics using high-low method. In the experimental results, it is demonstrated that the gate oxide deposited by LPCVD using TEOS which is post-deposition annealed in nitric oxide ambient is advantageous for trench-gate MOSFET due to its effectiveness for improving the interface quality and oxide reliability, whereas pre-deposition interfacial oxidation is deleterious to interface state density and breakdown strength.


2003 ◽  
Vol 786 ◽  
Author(s):  
J. R. Williams ◽  
T. Isaacs-Smith ◽  
S. Wang ◽  
C. Ahyi ◽  
R. M. Lawless ◽  
...  

ABSTRACTThe interface passivation process based on post-oxidation, high temperature anneals in nitric oxide (NO) is well established for SiO2 on (0001) 4H-SiC. The NO process results in an order of magnitude or more reduction in the interface state density near the 4H conduction band edge. However, trap densities are still high compared to those measured for Si / SiO2 passivated with post-oxidation anneals in hydrogen. Herein, we report the results of studies for 4H-SiC / SiO2 undertaken to determine the effects of additional passivation anneals in hydrogen when these anneals are carried out following a standard NO anneal. After NO passivation and Pt deposition to form gate contacts, post-metallization anneals in hydrogen further reduced the trap density from approximately 1.5 × 1012 cm−2eV−1 to about 6 × 1011 cm−2eV−1 at a trap energy of 0.1 eV below the band edge for dry thermal oxides on both (0001) and (11–20) 4H-SiC.


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