Characterization of Ultrathin Strained-Si Channel Layers of n-MOSFETs Using Transmission Electron Microscopy

2005 ◽  
Vol 864 ◽  
Author(s):  
Dalaver H. Anjum ◽  
Jian Li ◽  
Guangrui Xia ◽  
Judy L. Hoyt ◽  
Robert Hull
Keyword(s):  
Ion Implantation ◽  
Carrier Transport ◽  
Field Effect Transistors ◽  
Oxide Semiconductor ◽  
Threshold Region ◽  
Strained Si ◽  
Transmission Electron ◽  
Device Processing ◽  
Convergent Beam

AbstractStrained-Si based Field Effect Transistors (FETs) have enabled improvement of carrier transport in Metal Oxide Semiconductor (MOS)-based devices, both in the ON state of the device and in the sub-threshold region. This leads to devices with higher ratios of on-to-off current, improvements in the device sub-threshold slope, lower voltage operation, and carrier mobility enhancement. However, in order to understand the fundamental physics of these devices, it is important to address the stress conditions of the strained-Si channel layers after device processing, particularly after the ion-implantation process. In this work, we have studied Si+ self ion-implantation and thermally annealed strained-Si channel layers in n-MOSFETs. It has been observed that the density of defects in the strained-Si layer depends upon implant dose as well as thermal treatment. Using energy dispersive spectroscopy (EDS) spectra, it is found that Ge is present in the strained Si layer when analyzed after Si+ implantation and rapid thermal annealing. The presence of Ge in the strained Si channel layer causes relaxation of strain. This is verified by Convergent Beam Electron Diffraction (CBED) by measuring the lattice constant of the strained channel. It is concluded that electron mobility enhancements can be degraded in n- MOSFETs due to presence of both Ge up-diffusion and defects.

convergent-beam diffraction from surfaces

1987 ◽  
Vol 45 ◽  
pp. 30-33
Author(s):  
J. A. Eades ◽  
A. E. Smith ◽  
D. F. Lynch
Keyword(s):  
Reciprocal Lattice ◽  
Three Dimensional ◽  
Grazing Incidence ◽  
Three Dimensions ◽  
Plane Figure ◽  
Transmission Electron ◽  
Convergent Beam ◽  
Beam Patterns ◽  
Beam Diffraction

It is quite simple (in the transmission electron microscope) to obtain convergent-beam patterns from the surface of a bulk crystal. The beam is focussed onto the surface at near grazing incidence (figure 1) and if the surface is flat the appropriate pattern is obtained in the diffraction plane (figure 2). Such patterns are potentially valuable for the characterization of surfaces just as normal convergent-beam patterns are valuable for the characterization of crystals.There are, however, several important ways in which reflection diffraction from surfaces differs from the more familiar electron diffraction in transmission.GeometryIn reflection diffraction, because of the surface, it is not possible to describe the specimen as periodic in three dimensions, nor is it possible to associate diffraction with a conventional three-dimensional reciprocal lattice.

Novel Source Heterojunction Structures with Relaxed-/Strained-Layers for Quasi-Ballistic CMOS Transistors

2011 ◽  
Vol 470 ◽  
pp. 72-78 ◽  
Author(s):  
Tomohisa Mizuno ◽  
Mitsuo Hasegawa ◽  
Toshiyuki Sameshima
Keyword(s):  
Ion Implantation ◽  
Complementary Metal Oxide Semiconductor ◽  
Energy Difference ◽  
Oxide Semiconductor ◽  
Recoil Energy ◽  
The Novel ◽  
Mos Transistors ◽  
Oxide Interface ◽  
Strained Si ◽  
Strained Layers

We have studied new abrupt-source-relaxed/strained semiconductor-heterojunction structures for quasi-ballistic complementary-metal-oxide-semiconductor (CMOS) devices, by locally controlling the strain of a single strained semiconductor. Appling O+ ion implantation recoil energy to the strained semiconductor/buried oxide interface, Raman analysis of the strained layers indicates that we have successfully relaxed both strained-Si-on-insulator (SSOI) substrates for n-MOS and SiGe-on-insulator (SGOI) substrates for p-MOS without poly crystallizing the semiconductor layers, by optimizing O+ ion implantation conditions. As a result, it is considered that the source conduction and valence band offsets EC and EV can be realized by the energy difference in the source Si/channel-strained Si and the source-relaxed SiGe/channel-strained SiGe layers, respectively. The device simulator, considering the tunneling effects at the source heterojunction, shows that the transconductance of sub-10 nm source heterojunction MOS transistors (SHOT) continues to increase with increasing EC. Therefore, SHOT structures with the novel source heterojunction are very promising for future quasi-ballistic CMOS devices.

The Effect of Strain on the Formation of Dislocations at the SiGe/Si Interface

MRS Bulletin ◽  
1996 ◽  
Vol 21 (4) ◽  
pp. 38-44 ◽  
Author(s):  
F.K. LeGoues
Keyword(s):  
Metal Oxide ◽  
High Speed ◽  
High Performance ◽  
Field Effect Transistors ◽  
Low Cost ◽  
Complementary Metal Oxide Semiconductor ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Design Rule ◽  
Strained Si

Recently much interest has been devoted to Si-based heteroepitaxy, and in particular, to the SiGe/Si system. This is mostly for economical reasons: Si-based technology is much more advanced, is widely available, and is cheaper than GaAs-based technology. SiGe opens the door to the exciting (and lucrative) area of Si-based high-performance devices, although optical applications are still limited to GaAs-based technology. Strained SiGe layers form the base of heterojunction bipolar transistors (HBTs), which are currently used in commercial high-speed analogue applications. They promise to be low-cost compared to their GaAs counterparts and give comparable performance in the 2-20-GHz regime. More recently we have started to investigate the use of relaxed SiGe layers, which opens the door to a wider range of application and to the use of SiGe in complementary metal oxide semiconductor (CMOS) devices, which comprise strained Si and SiGe layers. Some recent successes include record-breaking low-temperature electron mobility in modulation-doped layers where the mobility was found to be up to 50 times better than standard Si-based metal-oxide-semiconductor field-effect transistors (MOSFETs). Even more recently, SiGe-basedp-type MOSFETS were built with oscillation frequency of up to 50 GHz, which is a new record, in anyp-type material for the same design rule.

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