Integration of Low Dielectric Constant Materials in Advanced Aluminum and Copper Interconnects

1999 ◽  
Vol 565 ◽  
Author(s):  
Bin Zhao ◽  
Maureen Brongo

AbstractAdvanced on-chip interconnects using new materials and new integration architectures are necessary for current and future IC chips in order to meet the requirements in performance, reliability and manufacturing cost. Insulating materials with low dielectric constant (low-κ) and conductive materials with low-resistivity have drawn significant attention for their possible applications in IC interconnects. Dual damascene interconnect integration architectures not only offer process simplification and low cost, but also enable the use of low-resistive Cu for interconnect wiring. Use of low-κ materials in dual damascene architecture is challenging due to material and processing issues. In this paper, the evolution of advanced interconnects, materials and technology options, and some recent achievements in advanced interconnect systems of low-κ dielectric and dual damascene architectures for both Al and Cu metallization are reviewed and discussed.

1999 ◽  
Vol 564 ◽  
Author(s):  
Bin Zhao ◽  
Maureen Brongo

AbstractAdvanced on-chip interconnects using new materials and new integration architectures are necessary for current and future IC chips in order to meet the requirements in performance, reliability and manufacturing cost. Insulating materials with low dielectric constant (low-κ) and conductive materials with low-resistivity have drawn significant attention for their possible applications in IC interconnects. Dual damascene interconnect integration architectures not only offer process simplification and low cost, but also enable the use of low-resistive Cu for interconnect wiring. Use of low-κ materials in dual damascene architecture is challenging due to material and processing issues. In this paper, the evolution of advanced interconnects, materials and technology options, and some recent achievements in advanced interconnect systems of low-κ dielectric and dual damascene architectures for both Al and Cu metallization are reviewed and discussed.


2001 ◽  
Vol 40 (Part 1, No. 4B) ◽  
pp. 2663-2668 ◽  
Author(s):  
Soo Geun Lee ◽  
Yun Jun Kim ◽  
Seung Pae Lee ◽  
Hyeok-Sang Oh ◽  
Seung Jae Lee ◽  
...  

1998 ◽  
Vol 524 ◽  
Author(s):  
Yanjun Ma ◽  
Hongning Yang ◽  
J. Guo ◽  
C. Sathe ◽  
A. Agui ◽  
...  

ABSTRACTPerformance of future generations of integrated circuits will be limited by the RC delay caused by on-chip interconnections. Overcoming this limitation requires the deployment of new high conductivity metals such as copper and low dielectric constant intermetal dielectrics (IMD). Fluorinated amorphous carbon (a-CFx) is a promising candidate for replacing SiO2 as the IMD. In this paper we investigated the structure and electronic properties of a-CFx thin films using high-resolution x-ray absorption, emission, and photoelectron spectroscopy. The composition and local bonding information were obtained and correlated with deposition conditions. The data suggest that the structure of the a-CFx is mostly of carbon rings and CF2 chains cross-linked with C atoms. The effects of growth temperature on the structure and the thermal stability of the film are discussed.


Author(s):  
Mikhail R Baklanov ◽  
Karen Maex

Materials with a low dielectric constant are required as interlayer dielectrics for the on-chip interconnection of ultra-large-scale integration devices to provide high speed, low dynamic power dissipation and low cross-talk noise. The selection of chemical compounds with low polarizability and the introduction of porosity result in a reduced dielectric constant. Integration of such materials into microelectronic circuits, however, poses a number of challenges, as the materials must meet strict requirements in terms of properties and reliability. These issues are the subject of the present paper.


1996 ◽  
Vol 427 ◽  
Author(s):  
Bin Zhao ◽  
Shi-Qing Wang ◽  
Steven Anderson ◽  
Robbie Lam ◽  
Marcy Fiebig ◽  
...  

AbstractIn high performance integrated circuits, low dielectric constant (low-ε) materials are required as inter-level dielectric (ILD) for on-chip interconnect to provide advantages in high speed, low dynamic power dissipation and low cross-talk noise. A variety of low dielectric constant materials, which include fluorinated silicon-oxide, porous silica and porous organic materials, chemical vapor deposited and spin-on deposited (SOD) organic materials, have been developed or are under development to fulfill this need. In this paper, we first review the need and integration architecture of low-ε materials for on-chip interconnect. Then, we discuss the consequence of using low-ε materials as ILD in advanced interconnect with emphasis on the ILD electrical characteristics and the interconnect reliability. Although the focus is on several new promising SOD low-ε materials, the developed evaluation methodology is applicable to other type low-ε materials as well.


1996 ◽  
Vol 427 ◽  
Author(s):  
R. Tacito ◽  
C. Steinbrüchel

AbstractParylene-n (pa-n) and benzocyclobutene (BCB) are novel candidate materials for interlevel dielectrics in future multilevel interconnects, due to their dielectric constant being much lower than that of silicon dioxide. We describe the fine line patterning of these materials by reactive ion etching in O2/CF4 plasmas. Examples of high aspect ratio trenches and dual damascene structures are presented involving processes with single and double hardmasks.


1995 ◽  
Vol 381 ◽  
Author(s):  
Ronald J. Gutmann ◽  
T. Paul Chow ◽  
David J. Duquette ◽  
Toh-Ming Lu ◽  
John F. Mcdonald ◽  
...  

AbstractLow dielectric constant insulators offer the potential of improved interconnection delay and conductor packing density in advanced ICs, both with current metallization schemes and with future technologies such as copper. While polymer materials are very promising in such applications, significant issues must be addressed before oxide-based materials are replaced in mainstream applications. This invited paper reviews the directions of our program, which has emphasized the use of vapor deposited polymers compatible with uniform deposition over large diameter wafers and copper metallization. Therefore, emphasis is placed on polymer material characteristics compatible with inlaid metal (ie. Dual Damascene) patterning.


1998 ◽  
Vol 511 ◽  
Author(s):  
C-K. Hu

ABSTRACTThe materials, process integration, and reliability issues in the development of multilevel electroplated Cu/polyimide on-chip interconnections are described. A combination of: good diffusion/adhesion barrier layers consisting of a metal liner plus the insulator Si3N4, and W stud/Si contacts resulted in a highly reliable IC chip. Electromigration of Cu damascene lines in both SiO2 and polyimide structures was investigated. Similar void growth was observed at the cathode ends of both the interconnect systems. However, the shapes of protrusions at the anode ends of the lines were different. Although the activation energies for both near bamboo-like Cu/SiO2 and Cu/polyimide were both 1.1 eV, the electromigration lifetime of the former was significantly longer. The difference is largely attributable to the poorer thermal conductivity of polyimide.


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