Low Dielectric Constant Polymers For On-Chip Interlevel Dielectrics With Copper Metallization

1995 ◽  
Vol 381 ◽  
Author(s):  
Ronald J. Gutmann ◽  
T. Paul Chow ◽  
David J. Duquette ◽  
Toh-Ming Lu ◽  
John F. Mcdonald ◽  
...  
Keyword(s):  
Dielectric Constant ◽  
Packing Density ◽  
Large Diameter ◽  
Polymer Materials ◽  
Low Dielectric Constant ◽  
Copper Metallization ◽  
Low Dielectric ◽  
On Chip ◽  
Future Technologies ◽  
Uniform Deposition

AbstractLow dielectric constant insulators offer the potential of improved interconnection delay and conductor packing density in advanced ICs, both with current metallization schemes and with future technologies such as copper. While polymer materials are very promising in such applications, significant issues must be addressed before oxide-based materials are replaced in mainstream applications. This invited paper reviews the directions of our program, which has emphasized the use of vapor deposited polymers compatible with uniform deposition over large diameter wafers and copper metallization. Therefore, emphasis is placed on polymer material characteristics compatible with inlaid metal (ie. Dual Damascene) patterning.

Spectroscopic Studies of Low Dielectric Constant Fluorinated Amorphous Carbon Films for Ulsi Integrated Circuits

1998 ◽  
Vol 524 ◽  
Author(s):  
Yanjun Ma ◽  
Hongning Yang ◽  
J. Guo ◽  
C. Sathe ◽  
A. Agui ◽  
...  
Keyword(s):  
Dielectric Constant ◽  
Integrated Circuits ◽  
Amorphous Carbon ◽  
Photoelectron Spectroscopy ◽  
Spectroscopic Studies ◽  
Carbon Films ◽  
Low Dielectric Constant ◽  
Low Dielectric ◽  
On Chip ◽  
Rc Delay

ABSTRACTPerformance of future generations of integrated circuits will be limited by the RC delay caused by on-chip interconnections. Overcoming this limitation requires the deployment of new high conductivity metals such as copper and low dielectric constant intermetal dielectrics (IMD). Fluorinated amorphous carbon (a-CFx) is a promising candidate for replacing SiO2 as the IMD. In this paper we investigated the structure and electronic properties of a-CFx thin films using high-resolution x-ray absorption, emission, and photoelectron spectroscopy. The composition and local bonding information were obtained and correlated with deposition conditions. The data suggest that the structure of the a-CFx is mostly of carbon rings and CF2 chains cross-linked with C atoms. The effects of growth temperature on the structure and the thermal stability of the film are discussed.

First Pass Study of Surface Modified Porous Low-k by Ion Implantation for Zero Thickness Barrier Requirement of Cu/MSQ/Si Stacks in Copper Metallization Scheme

2005 ◽  
Vol 863 ◽  
Author(s):  
Alok Nandini ◽  
U. Roy ◽  
Zubin P. Patel ◽  
H. Bakhru
Keyword(s):  
Mechanical Properties ◽  
Dielectric Constant ◽  
Ion Implantation ◽  
Porous Silica ◽  
Surface Hardness ◽  
Low Dielectric Constant ◽  
Copper Metallization ◽  
Porous Films ◽  
Critical Dimensions ◽  
Low Dielectric

AbstractLow-κ dielectrics have to meet stringent requirements in material properties in order to be successfully integrated. A particularly difficult challenge for material development is to obtain a combination of low dielectric constant with good thermal and mechanical properties. Incorporation of low dielectric constant materials such as porous silica based materials as a replacement to conventional dielectrics like SiO2 and use of Cu metallization schemes has become a necessity as critical dimensions of devices decrease. This paper is focused on the challenges in developing materials with low dielectric constant but strong thermo mechanical properties. Thin films of Ultra-Low materials such as porous Methyl Silsesquioxane (MSQ) (κ=2.2) were implanted with argon 1 × 1016 cm-2 dose at energies varying from 20 to 50 keV at room temperature. This work shows that the surface hardness of the porous films can be improved five times as compared to the as-deposited porous films by implanting Ar with 1 × 1016 cm-2 doses at 20 keV, sacrificing only a slight increase (∼9%) in dielectric constant (e.g., from 2.2 to 2.4). The hardness persists after 4500C annealing. In this current work, an ion implantation strategy was pursued to create a SiO2-like surface on MSQ. The effects of implantation parameters on the barrier property and bulk stability of MSQ were then studied. The results reveal one possible route to attain the “zero barrier thickness” requirement for interconnects systems.

Copper metallization of low-dielectric-constant a-SiCOF films for ULSI interconnects

2001 ◽  
Vol 13 (31) ◽  
pp. 6595-6608 ◽  
Author(s):  
Shi-Jin Ding ◽  
Qing-Quan Zhang ◽  
David Wei Zhang ◽  
Ji-Tao Wang ◽  
Wei William Lee
Keyword(s):  
Dielectric Constant ◽  
Low Dielectric Constant ◽  
Copper Metallization ◽  
Low Dielectric

Porous low dielectric constant materials for microelectronics

2005 ◽  
Vol 364 (1838) ◽  
pp. 201-215 ◽  
Author(s):  
Mikhail R Baklanov ◽  
Karen Maex
Keyword(s):  
Dielectric Constant ◽  
High Speed ◽  
Large Scale ◽  
Low Dielectric Constant ◽  
Low Dielectric ◽  
Large Scale Integration ◽  
The Subject ◽  
On Chip ◽  
Scale Integration ◽  
Selection Of

Materials with a low dielectric constant are required as interlayer dielectrics for the on-chip interconnection of ultra-large-scale integration devices to provide high speed, low dynamic power dissipation and low cross-talk noise. The selection of chemical compounds with low polarizability and the introduction of porosity result in a reduced dielectric constant. Integration of such materials into microelectronic circuits, however, poses a number of challenges, as the materials must meet strict requirements in terms of properties and reliability. These issues are the subject of the present paper.

Integration of Low Dielectric Constant Materials in Advanced Aluminum and Copper Interconnects

1999 ◽  
Vol 565 ◽  
Author(s):  
Bin Zhao ◽  
Maureen Brongo
Keyword(s):  
Dielectric Constant ◽  
Low Cost ◽  
Copper Interconnects ◽  
Low Dielectric Constant ◽  
Manufacturing Cost ◽  
Cu Metallization ◽  
Dual Damascene ◽  
Low Dielectric ◽  
On Chip ◽  
Interconnect Systems

AbstractAdvanced on-chip interconnects using new materials and new integration architectures are necessary for current and future IC chips in order to meet the requirements in performance, reliability and manufacturing cost. Insulating materials with low dielectric constant (low-κ) and conductive materials with low-resistivity have drawn significant attention for their possible applications in IC interconnects. Dual damascene interconnect integration architectures not only offer process simplification and low cost, but also enable the use of low-resistive Cu for interconnect wiring. Use of low-κ materials in dual damascene architecture is challenging due to material and processing issues. In this paper, the evolution of advanced interconnects, materials and technology options, and some recent achievements in advanced interconnect systems of low-κ dielectric and dual damascene architectures for both Al and Cu metallization are reviewed and discussed.

On Advanced Interconnect Using Low Dielectric Constant Materials as Inter-Level Dielectrics

1996 ◽  
Vol 427 ◽  
Author(s):  
Bin Zhao ◽  
Shi-Qing Wang ◽  
Steven Anderson ◽  
Robbie Lam ◽  
Marcy Fiebig ◽  
...  
Keyword(s):  
Dielectric Constant ◽  
High Speed ◽  
Organic Materials ◽  
Chemical Vapor ◽  
Evaluation Methodology ◽  
Low Dielectric Constant ◽  
Low Dielectric ◽  
Integration Architecture ◽  
Low Dielectric Constant Materials ◽  
On Chip

AbstractIn high performance integrated circuits, low dielectric constant (low-ε) materials are required as inter-level dielectric (ILD) for on-chip interconnect to provide advantages in high speed, low dynamic power dissipation and low cross-talk noise. A variety of low dielectric constant materials, which include fluorinated silicon-oxide, porous silica and porous organic materials, chemical vapor deposited and spin-on deposited (SOD) organic materials, have been developed or are under development to fulfill this need. In this paper, we first review the need and integration architecture of low-ε materials for on-chip interconnect. Then, we discuss the consequence of using low-ε materials as ILD in advanced interconnect with emphasis on the ILD electrical characteristics and the interconnect reliability. Although the focus is on several new promising SOD low-ε materials, the developed evaluation methodology is applicable to other type low-ε materials as well.

Integration of Low Dielectric Constant Materials in Advanced Aluminum and Copper Interconnects

1999 ◽  
Vol 564 ◽  
Author(s):  
Bin Zhao ◽  
Maureen Brongo
Keyword(s):  
Dielectric Constant ◽  
Low Cost ◽  
Copper Interconnects ◽  
Low Dielectric Constant ◽  
Manufacturing Cost ◽  
Cu Metallization ◽  
Dual Damascene ◽  
Low Dielectric ◽  
On Chip ◽  
Interconnect Systems

AbstractAdvanced on-chip interconnects using new materials and new integration architectures are necessary for current and future IC chips in order to meet the requirements in performance, reliability and manufacturing cost. Insulating materials with low dielectric constant (low-κ) and conductive materials with low-resistivity have drawn significant attention for their possible applications in IC interconnects. Dual damascene interconnect integration architectures not only offer process simplification and low cost, but also enable the use of low-resistive Cu for interconnect wiring. Use of low-κ materials in dual damascene architecture is challenging due to material and processing issues. In this paper, the evolution of advanced interconnects, materials and technology options, and some recent achievements in advanced interconnect systems of low-κ dielectric and dual damascene architectures for both Al and Cu metallization are reviewed and discussed.

Sign in / Sign up

Export Citation Format

Share Document