Under Bump Metallization Development For High Sn Solders

1997 ◽  
Vol 505 ◽  
Author(s):  
T. M. Korhonen ◽  
S. J. Hong ◽  
P. Su ◽  
C. Zhou ◽  
M. A. Korhonen ◽  
...  
Keyword(s):  
Flip Chip ◽  
Silicon Wafers ◽  
Under Bump Metallization ◽  
Shear Tests ◽  
Adhesion Layer ◽  
Solder Balls ◽  
Sputter Deposited ◽  
Pure Cu ◽  
Solder Interface ◽  
Intermetallic Layers

ABSTRACTSeveral under bump metallisation (UBM) schemes using Ni or CuNi alloys as the solderable layer were investigated. Cr or Ti was used as the adhesion layer. The UBM pads of different compositions were sputter deposited on silicon wafers and patterned using standard photolithographic processes. Eutectic Sn-Pb solder balls were reflowed on top of the pads. The resulting interfacial microstructures were examined by SEMIEDX analysis of cross-sectioned samples. The integrity of the UBMIsolder interface was characterized by micromechanical shear testing of flip chip test samples. Growth of intermetallic layers was found to be significantly slower in Ni and CuNi schemes compared to pure Cu. The joints on Ni and CuNi had also a better adhesion at the UBM/solder interface, and in the shear tests the fracture occurred through the solder

Under Bump Metallization Development for Eutectic Pb-Sn Solders

1998 ◽  
Vol 515 ◽  
Author(s):  
S. J. Hong ◽  
T. M. Korhonen ◽  
M. A. Korhonen ◽  
C.-Y. LI
Keyword(s):  
Electron Microscopy ◽  
Scanning Electron Microscopy ◽  
Flip Chip ◽  
Electronics Packaging ◽  
Experimental Result ◽  
Under Bump Metallization ◽  
Shear Testing ◽  
Adhesion Layer ◽  
Solder Balls ◽  
Scanning Electron

ABSTRACTDue to its advantage in number of I/Os over other interconnection method, flip chip interconnection technology plays a key role in today's electronics packaging. Good understanding of interfacial reactions between the solder balls and under bump metallizations (UBM) is crucial in producing sound and reliable solder joints. In the present paper, several new under bump metallization (UBM) schemes using Ni or CuNi alloys as solderable layer are investigated. Cr or Ti is used as the adhesion layer. Test joint are made by reflowing eutectic Pb-Sn solder balls on UBMs and through the use of scanning electron microscopy (SEM) and micromechanical shear testing, the reliability of the UBM scheme is determined. Experimental result shows that some of the new schemes, featuring CuNi wettable layer with Cr or Ti adhesion layer produce reliable joints.

Microstructure and Reliability of Sputter Deposited Cr-Crcu-Cu thin Films for Flip-Chip Applications

1996 ◽  
Vol 445 ◽  
Author(s):  
Na Zhang ◽  
Mark Mcnicholas ◽  
Neil Colvin
Keyword(s):  
Cross Sections ◽  
Thermal Cycle ◽  
Flip Chip ◽  
Grain Structure ◽  
Transmission Electron ◽  
Alloy Solder ◽  
Solder Balls ◽  
Columnar Grain ◽  
Sputter Deposited ◽  
Bond Pads

AbstractThe Cr‐CrCu‐Cu metal scheme, as a terminal multistructure metallization for flip chip applications, has been investigated utilizing PVD sputter deposition varying the conditions of deposition power and temperature, and film thickness. A modified Controlled Collapse Chip Connection (C4) process was utilized in order to evaluate the aforementioned deposition of the Cr‐CrCu‐Cu multilayers and the effect of film microstructure on the parameters of shear strength and thermal cycle reliability. Thermal cycle reliability results proved to be a function of both the CrCu alloy and the Cu overlayer thickness. Transmission electron microscopy (TEM) cross‐sections of the Cr‐CrCu‐Cu multilayers suggests that the columnar grain structure of the CrCu layer may provide a sacrificial thermal diffusion barrier between the PbSn alloy solder balls and the Al bond pads during the thermal‐cycle tests.

Flip Chip Metallurgies for Lead-Free Solders

1998 ◽  
Vol 515 ◽  
Author(s):  
T. M. Korhonen ◽  
S. J. Hong ◽  
M. A. Korhonen ◽  
C.-Y. LI
Keyword(s):  
Flip Chip ◽  
Lead Free ◽  
Weak Interface ◽  
Under Bump Metallization ◽  
Adhesion Layer ◽  
Edx Analysis ◽  
Underbump Metallization ◽  
Quality And Reliability ◽  
Lead Free Solders ◽  
Made In

ABSTRACTThe most commonly used lead-free solders contain large amounts of tin, which makes them incompatible with the conventional Cu-based underbump metallization (UBM) schemes. The tin in the solder reacts with the copper layer of the UBM, depleting the UBM of copper and causing loss of adhesion and a weak interface. Use of new under bump metallization schemes with Ni or CuNi alloys as the solderable layer were investigated in this study. Instead of Cr, a Tibased adhesion layer was used to decrease the amount of stress in the CuNi layer. Flip chip solder joints were made in which three Sn-Bi-Ag based lead-free solders were reflowed to several UBM pads of different compositions. The resulting interfacial microstructures were examined by SEM/EDX analysis of cross-sectioned samples. The joints were also mechanically tested in fatigue and shear to assess the quality and reliability of the interface.

Electromigration Performance of Pb-Free μPILR™ Flip-Chip Packages

2010 ◽  
Vol 2010 (1) ◽  
pp. 000234-000241
Author(s):  
Rajesh Katkar ◽  
Laura Mirkarimi
Keyword(s):  
Thin Film ◽  
Flip Chip ◽  
Solder Joints ◽  
Void Formation ◽  
Current Direction ◽  
Under Bump Metallization ◽  
Substrate Side ◽  
Solder Interface

The μPILR interconnect is a copper pillar manufactured as a part of a substrate pad. In this paper, we discuss the electromigration (EM) performance of Pb-free μPILR interconnects in a multi-pair daisy chain within 150μm pitch flip-chip packages. Electromigration performance of μPILR interconnects has shown a significant improvement and noticeably delayed electromigration induced failures. Voids initially begin to appear at Cu6Sn5 and solder interface on the die side, with eventual open failure due to excessive void formation along with a severe depletion of Cu Under Bump Metallization (UBM). No failure was observed on the substrate side of the interconnect regardless of the current direction. The enhanced performance of the μPILR interconnect along with other reliability benefits makes it an excellent alternative to conventional solder joints including thin film stack UBMs, thicker copper UBM as well as copper pillar on die.

Influence of substrate metallization on diffusion and reaction at the under-bump metallization/solder interface in flip-chip packages

2002 ◽  
Vol 17 (11) ◽  
pp. 2757-2760 ◽  
Author(s):  
F. Zhang ◽  
M. Li ◽  
C. C. Chum ◽  
K. N. Tu
Keyword(s):  
Flip Chip ◽  
Interfacial Reactions ◽  
Under Bump Metallization ◽  
Ni Substrate ◽  
Enhanced Dissolution ◽  
Substrate Side ◽  
Influence Of Substrate ◽  
Solder Interface ◽  
Eutectic Snpb ◽  
Thermal Stability Of

In flip-chip packages, the effect of Ni metallization on the substrate side on interfacial reactions between solders and an Al/Ni(V)/Cu under-bump metallization (UBM) on the chip side was investigated during the reflow process. The Ni substrate metallization greatly accelerated interfacial reactions on the chip side and quickly degraded the thermal stability of the UBM due to a fast consumption of the Ni(V) layer. This phenomenon can be explained in terms of rapid Ni or Sn diffusion in the ternary (Cu,Ni)6Sn5 phase, which was formed in the solder adjacent to the Ni(V) layer and the enhanced dissolution of (Cu,Ni)6Sn5 into the molten solder. Without the Ni metallization on the substrate side, the Al/Ni(V)/Cu UBM remained very stable with both eutectic SnPb and Pb-free solders.

Reliability analysis of Au–Sn flip-chip solder bump fabricated by co-electroplating

2007 ◽  
Vol 22 (5) ◽  
pp. 1219-1229 ◽  
Author(s):  
Jeong-Won Yoon ◽  
Hyun-Suk Chun ◽  
Seung-Boo Jung
Keyword(s):  
Brittle Failure ◽  
Flip Chip ◽  
Solder Bump ◽  
Solder Matrix ◽  
Average Diameter ◽  
Under Bump Metallization ◽  
Mechanical Reliability ◽  
Shear Tests ◽  
Solder Bumps ◽  
Δ Phase

In this study, we fabricated eutectic Au–Sn (Au–20 wt% Sn) flip-chip solder bumps from a single electroplating bath. After reflowing, the average diameter of the solder bump was approximately 80 μm. The (Ni,Au)3Sn2 phase was initially formed when the liquid Au–Sn solder reacted with the Ni UBM (under bump metallization). After aging at 150 °C, the (Ni,Au)3Sn2 intermetallic compound (IMC), which formed at the interface during reflow, was fully transformed into the (Au,Ni)Sn IMC due to the restricted supply of Ni atoms from the UBM to the interface. On the other hand, after aging at 250 °C for 1000 h, two IMC layers, (Au,Ni)Sn and (Ni,Au)3Sn2, were formed at the interface. The lower (Ni,Au)3Sn2 phase was formed when the (Au,Ni)Sn phase reacted with the Ni UBM. The interfacial (Au,Ni)Sn IMC grew with the preferential consumption of the available δ-phase in the solder matrix. Eventually, the ζ-phase covered most of the interfacial layer. In the bump shear tests, the Au–Sn/Ni joint aged at 150 °C fractured through the bulk of the solder, confirming the mechanical reliability of the interface. In contrast, the Au–Sn/Ni joint aged at 250 °C fractured along the interface, thereby demonstrating brittle failure, possibly a result of the brittle IMC layer at the interface.

Effect of Design Parameters on Drop Test Performance of Wafer Level Chip Scale Packages (WLCSP)

2011 ◽  
Author(s):  
Pushkraj Tumne ◽  
Vikram Venkatadri ◽  
Santosh Kudtarkar ◽  
Michael Delaus ◽  
Daryl Santos ◽  
...  
Keyword(s):  
Flip Chip ◽  
Bulk Solder ◽  
Consumer Electronics ◽  
Drop Test ◽  
Design Parameters ◽  
Mechanical Shock ◽  
Wafer Level ◽  
Cross Sectional ◽  
Right Censored Data ◽  
Solder Balls

Today’s consumer market demands electronics that are smaller, faster and cheaper. To cater to these demands, novel materials, new designs, and new packaging technologies are introduced frequently. Wafer Level Chip Scale Package (WLCSP) is one of the emerging package technologies that have the key advantages of reduced cost and smaller footprint. The portable consumer electronics are frequently dropped; hence the emphasis of reliability is shifting towards study of effects of mechanical shock loading increasingly. Mechanical loading typically induces brittle fractures (also known as intermetallic failures) between the solder bumps and bond pads at the silicon die side. This type of failure mechanism is typically characterized by the board level drop test. WLCSP is a variant of the flip-chip interconnection technique. In WLCSPs, the active side of the die is inverted and connected to the PCB by solder balls. The size of these solder balls is typically large enough (300μm pre-reflow for 0.5mm pitch and 250μm pre-reflow for 0.4mm pitch) to avoid use of underfill that is required for the flip-chip interconnects. Several variations are incorporated in the package design parameters to meet the performance, reliability, and footprint requirements of the package assembly. The design parameters investigated in this effort are solder ball compositions with different Silver (Ag) content, backside lamination with different thickness, WLCSP type –Direct and Re-Distribution Layer (RDL), bond pad thickness, and sputtered versus electroplated Under Bump Metallurgy (UBM) deposition methods for 8×8, 9×9, and 10×10 array sizes. The test vehicles built using these design parameters were drop tested using JEDEC recommended test boards and conditions as per JESD22-B11. Cross sectional analysis was used to identify, confirm, and classify the intermetallic, and bulk solder failures. The objective of this research was to quantify the effects and interactions of WLCSP design parameters through drop test. The drop test data was collected and treated as a right censored data. Further, it was analyzed by fitting empirical distributions using the grouped and un-grouped data approach. Data analysis showed that design parameters had a significant effect on the drop performance and played a vital role in influencing the package reliability.

scholarly journals Growth Kinetics of Reaction Layers in Flip Chip Joints with Cu-cored Lead-free Solder Balls

2004 ◽  
Vol 45 (3) ◽  
pp. 754-758 ◽  
Author(s):  
Ikuo Shohji ◽  
Yuji Shiratori ◽  
Hiroshi Yoshida ◽  
Masahiko Mizukami ◽  
Akira Ichida
Keyword(s):  
Growth Kinetics ◽  
Flip Chip ◽  
Lead Free ◽  
Lead Free Solder ◽  
Solder Balls ◽  
Free Solder ◽  
Kinetics Of Reaction ◽  
Kinetics Of

Low Stress Under Bump Metallizations for Direct Chip Attach

1998 ◽  
Vol 555 ◽  
Author(s):  
P. Su ◽  
T. M. Korhonen ◽  
S. J. Hong ◽  
M. A. Korhonen ◽  
C. Y. Li
Keyword(s):  
Flip Chip ◽  
Semiconductor Industry ◽  
Organic Substrate ◽  
Organic Substrates ◽  
Under Bump Metallization ◽  
Interfacial Failure ◽  
Stress Measurements ◽  
Rapid Reaction

AbstractIn order to use a flip chip method for bonding the Si chip directly to an organic substrate, compatible under bump metallization (UBM) must be available. Conventional schemes with a copper-based solderable layer are not well compatible with the high-tin solders (such as eutectic Pb-Sn) used with organic substrates. This is due to the rapid reaction between Sn and Cu which depletes the UBM of copper. Ni-based schemes exhibit slower reaction with the solder and have been identified by the semiconductor industry as preferable replacements to Cu-based UBM's. However, Ni-containing metallurgies are often associated with high stresses, which results in poor practical adhesion between the silicon chip and the metallization, leading to interfacial failure during fabrication or service. In this research, several nickel-containing UBM schemes are studied experimentally. Stress measurements are made for each metallization before patterning of UBM pads. An optimal Ni concentration for the UBM is suggested based on the results from this study.

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