Characteristics of Sub-micron Polysilicon Thin Film Transistors

1994 ◽  
Vol 345 ◽  
Author(s):  
Kola R Olasupo ◽  
Professor M. K. Hatalis
Keyword(s):  
Thin Film ◽  
Leakage Current ◽  
High Speed ◽  
Thin Film Transistor ◽  
Random Access ◽  
Channel Length ◽  
Large Area ◽  
Short Channel ◽  
Active Matrix ◽  
Static Random Access Memories

AbstractThe polysilicon thin film transistor has been actively studied for the large area display applications like active matrix liquid crystal displays and for load cell in static random access memories. Due to low effective carrier mobility in polysilicon, the circuit speed is limited. Since the circuit delay time is directly proportional to the square of the channel length, short channel TFTs will be advantageous for high speed applications. In this work, we have studied the current voltage characteristics of an inverted sub-micron P-channel polysilicon thin-film transistor with self-aligned LDD structure to obtain a well-controlled channel and drain offset lengths. The particular features we examined are the leakage current and mobility. The leakage current and the ON current were found to be in the picoamp and micro-amp range respectively for devices having channel length in the range of 1.0μm to 0.35μm. Even very small devices having L&W = 0.35μm × 0.35μm exhibited characteristics similar to wider devices. The on/off current ratio was in the order of 105 before hydrogenation.

Theory of Vertical Amorphous Silicon Thin-Film Transistors

1989 ◽  
Vol 149 ◽  
Author(s):  
J. G. Shaw ◽  
M. Hack
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistor ◽  
Channel Length ◽  
Large Area ◽  
Silicon Thin Film ◽  
Short Channel ◽  
Design And Optimization ◽  
Current Path ◽  
Output Characteristics

ABSTRACTWe describe a vertical amorphous silicon thin-film transistor which is easy to fabricate and has a very short channel length that is determined by deposition, not lithography. Our vertical TFTs are compatible with large-area processing techniques andd have suitable terminal characteristics for use in practical circuits. Unlike a conventional thin-film transistor, the current path is primarily parallel to the electric field created by an insulated gate electrode. A two-dimensional computer program is used to analyze these devices and guide their design and optimization. We show how to suppress excessive leakage currents and improve the saturation of the output characteristics by a novel current-blocking technique.

THIN-FILM TRANSISTOR MODELING

1998 ◽  
Vol 09 (03) ◽  
pp. 703-723 ◽  
Author(s):  
BENJAMIN IÑIGUEZ ◽  
TOR A. FJELDLY ◽  
MICHAEL S. SHUR
Keyword(s):  
Thin Film ◽  
Thin Film Transistor ◽  
Organic Thin Film Transistors ◽  
Short Channel Effects ◽  
Organic Thin Film ◽  
Large Area ◽  
Short Channel ◽  
Dc Characteristics ◽  
Channel Effects ◽  
Operating Regimes

We review recent physics-based, analytical DC models for amorphous silicon (a-Si), polysilicon (poly-Si), and organic thin film transistors (TFTs), developed for the design of novel ultra high-resolution, large area displays using advanced short-channel TFTs. In particular, we emphasize the modeling issues related to the main short-channel effects, such as self-heating (a-Si TFTs) and kink effect (a-Si and poly-Si TFTs), which are present in modern TFTs. The models have been proved to accurately reproduce the DC characteristics of a-Si:H with gate lengths down to 4 μm and poly-Si TFTs with gate lengths down to 2 μm. Because the scalability of the models and the use of continuous expressions for describing the characteristics in all operating regimes, the models are suitable for implementation in circuit simulators such as SPICE.

Potential of Hot Wire CVD for Active Matrix TFT Manufacturing

2009 ◽  
Vol 1153 ◽  
Author(s):  
Ruud E.I. Schropp ◽  
Zomer Silvester Houweling ◽  
Vasco Verlaan
Keyword(s):  
Thin Film ◽  
Thin Films ◽  
Mass Density ◽  
Thin Film Transistor ◽  
Chemical Vapor ◽  
High Mass ◽  
Hot Wire ◽  
Large Area ◽  
Active Matrix ◽  
Electrical Fields

AbstractHot Wire Chemical Vapor Deposition (HWCVD) is a fast deposition technique with high potential for homogeneous deposition of thin films on large area panels or on continuously moving substrates in an in-line manufacturing system. As there are no high-frequency electromagnetic fields, scaling up is not hampered by finite wavelength effects or the requirement to avoid inhomogeneous electrical fields. Since 1996 we have been investigating the application of the HWCVD process for thin film transistor manufacturing. It already appeared then that these Thin Film Transistors (TFTs) were electronically far more stable than those with Plasma Enhanced (PE) CVD amorphous silicon. Recently, we demonstrated that very compact SiNx layers can be deposited at high deposition rates, up to 7 nm/s. The utilization of source gases in HWCVD of a-Si3N4 films deposited at 3 nm/s is 75 % and 7 % for SiH4 and NH3, respectively. Thin films of stoichiometric a-Si3N4 deposited at this rate have a high mass-density of 3.0 g/cm3. The dielectric properties have been evaluated further in order to establish their suitability for incorporation in TFTs. Now that all TFT layers, namely, the SiNx insulator, the a-Si:H or μc Si:H layers, and the n-type doped thin film silicon can easily be manufactured by HWCVD, the prospect of “all HWCVD” TFTs for active matrix production is within reach. We tested the 3 nm/s SiNx material combined with our protocrystalline Si:H layers deposited at 1 nm/s in ‘all HW’ TFTs. Results show that the TFTs are state of the art with a field-effect mobility of 0.4 cm2/Vs. In order to assess the feasibility of large area deposition we are investigating in-line HWCVD for displays and solar cells.

A One-Micrometer Channel Length α-Si Thin-Film Field-Effect Transistor

1984 ◽  
Vol 33 ◽  
Author(s):  
Z. Yaniv ◽  
G. Hansell ◽  
M. Vijan ◽  
V. Cannella
Keyword(s):  
Thin Film ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Liquid Crystal Displays ◽  
Channel Length ◽  
Large Area ◽  
Short Channel ◽  
Threshold Voltages ◽  
Effect Transistor ◽  
Si Thin Film

ABSTRACTA new method of fabricating short channel α-Si TFTs has been developed. One-micrometer channel length α-Si thin-film field effect transistors have been fabricated and tested. Threshold voltages as low as 1.9V and field-effect mobilities as high as 1 cm 2/V-sec are reported. These devices were fabricated by techniques compatible with the production of large area liquid crystal displays.

Organic Thin-Film-Transistors with High on/off Ratios

1995 ◽  
Vol 377 ◽  
Author(s):  
L. Torsi ◽  
A. Dodabalapur ◽  
H. E. Katz ◽  
A. J. Lovinger ◽  
R. Ruel
Keyword(s):  
Thin Film ◽  
Thin Film Transistors ◽  
Switching Time ◽  
Channel Length ◽  
Organic Thin Film ◽  
Field Effect Mobility ◽  
Short Channel ◽  
Active Matrix ◽  
Current Voltage ◽  
Active Matrix Displays

ABSTRACTIn this article a new procedure to obtain alpha-hexathienylene (α-6T) thin-film-transistors (TFTs) with on/off ratios in excess of one million is reported. This procedure involves subjecting the TFTs to rapid thermal annealing. Previously, high on/off ratios have been achieved with improved device design and better chemical synthesis of α-6T oligomers. High on/off ratios, along with a switching time of ∼ 10 μs, render α-6T TFTs potential candidates as switching devices in active matrix displays. The experimental current-voltage (I-V) characteristics of oc-6T TFTs with channel length L = 4μm are also presented and a measured field effect mobility of 0.02 cm2/V-s is extracted from these characteristics using an analytical model which we have developed for short-channel α-6T TFTs.

P-20: A Short Channel Effect in Low Temperature Poly-Si Thin Film Transistor for Active Matrix Display

2006 ◽  
Vol 37 (1) ◽  
pp. 254 ◽  
Author(s):  
J. H. Park ◽  
W. J. Nam ◽  
J. H. Lee ◽  
M. K. Han ◽  
K. Y. Lee ◽  
...  
Keyword(s):  
Thin Film ◽  
Low Temperature ◽  
Thin Film Transistor ◽  
Short Channel ◽  
Short Channel Effect ◽  
Active Matrix ◽  
Channel Effect ◽  
Si Thin Film

Short Channel Amorphous Silicon MOS Structures with Reduced Capacitance

1985 ◽  
Vol 49 ◽  
Author(s):  
Z. Yaniv ◽  
V. Cannella ◽  
G. Hansell ◽  
M. Vijan
Keyword(s):  
Liquid Crystal ◽  
Amorphous Silicon ◽  
Liquid Crystal Displays ◽  
Channel Length ◽  
Oblique Angle Deposition ◽  
Large Area ◽  
Short Channel ◽  
Active Matrix ◽  
Silicon Alloy ◽  
Mos Structures

AbstractWe report improvements in device structures by the reduction of capacitance in short channel length thin film transistors of amorphous silicon alloy materials. Employing techniques similar to those previously reported [1,2], these MOS structures are fabricated with channel lengths of 1 to 2 micrometers using standard photolithography with 10 micrometer minimum feature size. Significant reductions in capacitance over earlier reported device designs were achieved by improvements in device geometry and innovative use of shadowing techniques utilizing oblique angle deposition to minimize overlap between electrodes. Theses reduced capacitance short channel length TFTs enhance the possibility of fabricating on-board drivers for active matrix liquid crystal displays using amorphous silicon alloy devices. Despite the relatively low mobility of amorphous silicon (∼ 1 cm2 /V-sec) these short channel length TFTs can provide currents large enough for operation in the megahertz regime when these reductions in capacitance are incorporated. The noncritical photolithography assures that devices may be fabricated over large area substrates (8" × 8") with acceptable yields. Computer simulations predict that these TFTs will be able to provide the necessary speed for on-substrate drivers. We will present experimental results from the new TFT structures and describe modeling methods and results for amorphous silicon TFT ring oscillators. We will discuss the significance of these results as they pertain to drive circuitry for large area liquid crystal displays.

100-nm Channel Length a-Si:H Vertical Thin Film Transistors

2004 ◽  
Vol 814 ◽  
Author(s):  
Isaac Chan ◽  
Arokia Nathan
Keyword(s):  
Thin Film ◽  
Thin Film Transistors ◽  
Vertical Channel ◽  
Channel Length ◽  
Channel Structure ◽  
Large Area ◽  
Short Channel ◽  
Low Leakage ◽  
Low Leakage Current ◽  
Channel Effects

AbstractThis paper reports on hydrogenated amorphous silicon (a-Si:H) vertical thin film transistors (VTFTs) with channel length of 100 nm, using conventional planar TFT processing technology. The device has a fully self-aligned vertical channel structure, which is highly insensitive to the non-uniformity of reactive ion etching (RIE). Therefore, the VTFT process is very suitable for large-area electronics. Presently, we can demonstrate VTFTs with remarkable ON/OFF current ratio of more than 108, low leakage current down to 1 fA, and good subthreshold slope of 0.8 V/dec at Vd = 1.5 V. The impacts of contemporary device issues, such as short-channel effects and contact resistance, on the performance of short-channel VTFTs and suggested avenues for improvement are discussed.

scholarly journals Modeling and Simulation Techniques of Amorphous Silicon Thin Film Transistors (TFT) for Large Area and Flexible Microelectronics

2020 ◽  
Vol 9 (5) ◽  
pp. 270-273
Keyword(s):  
Thin Film ◽  
Thin Film Transistors ◽  
Liquid Crystal Display ◽  
Thin Film Transistor ◽  
Simulation Software ◽  
Active Components ◽  
Large Area ◽  
Silicon Thin Film ◽  
Flexible Display ◽  
Active Matrix

The Thin Film Transistor (TFT) is the key active components of emerging large area and flexible microelectronics (LAFM) which includes a flexible display, robotics skin, sensor & disposable electronics. Different semiconducting or organic conducting materials could be used in the fabrication of TFTs. The material used for the active layer also influences the performance of the TFT uniquely[1]. Silicon based thin film transistors have made possible the development of the active-matrix liquid crystal display within cell-touch technology [2,3,4]. Modern-day simulation software does not support the older SPICE code models, and rather rely on the new drag and drop concepts. The TFT(Thin Film Transistor) Model device wasn't readily available on the LT-Spice Tool which was simulated and the circuit level simulation for basic gates using the TFT was carried out successfully. The model symbol shall be useful for analysis and simulation of the TFT based circuits which require continuous behavioral study and analysis. For a device to be simulated that way, a “.lib” file containing a symbol of the device is necessary. This paper focuses on circuit-level simulation of user-defined device parameters from reported experimental data.

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