Ultra Low Thermal Budget Rapid Thermal Processing for Thin Gate Oxide Dielectrics: Reduction of Suboxide Transition Regions in Low Temperature Processed Si/SiO2 Structures by A 900°C 30 Second Rapid Thermal Anneal

1997 ◽  
Vol 470 ◽  
Author(s):  
G. Lucovsky ◽  
B. Hinds
Keyword(s):  
Low Temperature ◽  
Thermal Processing ◽  
Gate Dielectric ◽  
Rapid Thermal Processing ◽  
Rapid Thermal Anneal ◽  
Thermal Budget ◽  
Kinetic Effects ◽  
C 30 ◽  
Thin Gate Oxide ◽  
Low Thermal Budget

ABSTRACTDevice quality gate dielectric heterostructures have been prepared using a three step plasma/rapid thermal sequence [1] in which kinetic effects determine the time-temperature aspects of the processing. The steps for forming the interface and for depositing dielectric layers have been performed at low temperature, ∼300°C, by plasma-assisted processing. Following this a low rapid thermal anneal (RTA) provides interface and bulk dielectric chemical and structural relaxations, thereby yielding device performance and reliability essentially the same as obtained using higher thermal budget conventional or rapid thermal processing.

Beyond Thermal Budget: Using D · t In Kinetic Optimization Of RTP

1998 ◽  
Vol 525 ◽  
Author(s):  
R. Ditchfield ◽  
E. G. Seebauer
Keyword(s):  
Thermal Processing ◽  
Program Design ◽  
Rapid Thermal Processing ◽  
Dopant Diffusion ◽  
Thermal Budget ◽  
Microelectronic Fabrication ◽  
Kinetic Effects ◽  
Rigorous Method

ABSTRACTRapid thermal processing (RTP) has found continually increasing use for oxidation, silicidation, CVD, and other steps in microelectronic fabrication. Kinetic effects in rapid thermal processing (RTP) are often assessed using the concept of thermal budget, with the idea that low thermal budgets should minimize dopant diffusion and interface degradation. Some definitions of budget employ the product of temperature and time (T-t). In previous work, we have shown that this definition for budget often leads to qualitatively incorrect conclusions regarding heating program design. However, other definitions of budget employ the product of diffusivity and time (D-t), where the diffusivity describes unwanted diffusion or interface degradation. Here we show that minimization of D-t by itself is insufficient to kinetically optimize a heating program; account must be taken of the relative rates of the desired and undesired phenomena. We present a straightforward but rigorous method for doing so.

Problems with The Concept of Thermal Budget: Experimental Demonstrations

1997 ◽  
Vol 470 ◽  
Author(s):  
R. Ditchfield ◽  
E. G. Seebauer
Keyword(s):  
Chemical Vapor Deposition ◽  
Vapor Deposition ◽  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Chemical Vapor ◽  
Dopant Diffusion ◽  
Thermal Budget ◽  
Kinetic Effects ◽  
Rapid Isothermal Processing ◽  
Diffusion Problems

ABSTRACTUp to now, kinetic effects in rapid thermal processing (RTP) have been assessed using the concept of thermal budget, with the idea that thermal budget minimization should minimize dopant diffusion and interface degradation. This work highlights shortcomings with that principle. Experiments comparing directly the rate of Si chemical vapor deposition with that of dopant diffusion show how thermal budget minimization can actually worsen diffusion problems rather than mitigate them. We present a straightforward framework for improving the results through comparison of activation energies of the desired and undesired phenomena. This framework explains the experimental results and provides strong kinetic arguments for continued development of rapid isothermal processing and small batch fast ramp methods.

General Kinetic Rules for Rapid Thermal Processing

1996 ◽  
Vol 429 ◽  
Author(s):  
R. Ditchfield ◽  
E. G. Seebauer
Keyword(s):  
Conceptual Framework ◽  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Activation Energies ◽  
Thermal Budget ◽  
Kinetic Effects ◽  
Physical Phenomena

AbstractUp to now, kinetic effects in rapid thermal processing (RTP) have been assessed qualitatively and rather vaguely through the concept of thermal budget. We discuss the shortcomings associated with thermal budget and present an alternate conceptual framework that explicitly treats selectivity between desired and undesired physical phenomena. This framework is quite simple and is intended for rapidly assessing the qualitative effects of various heating programs. From a purely kinetic perspective, selecting the best program involves only comparing the activation energies for the desired and undesired rate phenomena. We cite examples where application of the thermal budget approach gives incorrect guidance for minimizing the undesired process. Such deficiencies are rectified by the framework presented here.

Low thermal budget in situ cleaning and passivation for silicon epitaxy in a multichamber rapid thermal processing cluster tool

1994 ◽  
Vol 21 (2) ◽  
pp. 137-141 ◽  
Author(s):  
Mahesh K. Sanganeria ◽  
Katherine E. Violette ◽  
Mehmet C. Öztürk ◽  
Gari Harris ◽  
C.Archie Lee ◽  
...  
Keyword(s):  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Thermal Budget ◽  
Silicon Epitaxy ◽  
Low Thermal Budget ◽  
Cluster Tool

Low temperature shallow junction formation using vacuum ultraviolet photons during rapid thermal processing

1997 ◽  
Vol 70 (13) ◽  
pp. 1700-1702 ◽  
Author(s):  
R. Singh ◽  
K. C. Cherukuri ◽  
L. Vedula ◽  
A. Rohatgi ◽  
S. Narayanan
Keyword(s):  
Low Temperature ◽  
Thermal Processing ◽  
Vacuum Ultraviolet ◽  
Rapid Thermal Processing ◽  
Shallow Junction ◽  
Junction Formation ◽  
Ultraviolet Photons

Rapid Thermal Processes for Future Nanometer MOS Devices

1998 ◽  
Vol 525 ◽  
Author(s):  
John R. Hauser
Keyword(s):  
Thermal Processing ◽  
Gate Dielectric ◽  
Rapid Thermal Processing ◽  
Dielectric Materials ◽  
Nanometer Scale ◽  
Thermal Processes ◽  
Contact Material ◽  
Mos Devices ◽  
Front End ◽  
Projected Changes

ABSTRACTScaling of MOS devices is projected to continue down to device dimensions of at least 50 nm. However, there are many potential roadblocks to achieving such dimensions and many standard materials and front-end processes which must be significantly changed to achieve these goals. The most important areas for change include (a) gate dielectric materials, (b) gate contact material, (c) source/drain contacting structure and (d) fundamental bulk CMOS structure. These projected changes are reviewed along with possible applications of rapid thermal processing to achieving future nanometer scale MOS devices.

Sign in / Sign up

Export Citation Format

Share Document