Pattern Related Non-Uniformities During Rapid Thermal Processing

1996 ◽  
Vol 429 ◽  
Author(s):  
R. Bremensdorfer ◽  
S. Marcus ◽  
Z. Nenyei
Keyword(s):  
Thermal Processing ◽  
Rapid Heating ◽  
Rapid Thermal Processing ◽  
Emission Spectra ◽  
Wafer Surface ◽  
Interference Effects ◽  
Indirect Control ◽  
Thermal Oxide ◽  
Substrate Temperatures ◽  
Related Process

AbstractState of the art rapid thermal processing is able to produce a lateral thermal homogeneity which is within the inherent resolution limits of current meterology. For the most commonly used direct or indirect control methods such as multiple thermocouple measurements, rapid thermal oxidation (RTO), or rapid thermal annealing (RTA) of plain semiconductor wafers this limit is ± 2°C. As homogeneity requirements approach those limits, pattern induced non-uniformities are getting more important.In order to achieve rapid heating and high substrate temperatures in RTP, heater and substrate are not in equilibrium and their emission spectra differ considerably. Under such circumstances laterally varying optical characteristics on the substrate itself imply thermal non-uniformities. The influence of patterns on a silicon wafer surface on the temperature uniformity is studied. Passive patterns showing interference effects were formed out of thermal oxide and Si3N4. RTO and RTA, as well as embedded thermocouples were used for temperature measurement. The data presented show that major non-uniformities due to interference effects can be reduced by restricting the energy transfer through the patterned side of the wafer. It is shown that independent top and bottom heater bank control and controlled thermal kinetics are suitable methods to reduce the pattern related process non-uniformities.

Transient And Spatial Radiative Properties Of Patterned Wafers During Rapid Thermal Processing

1995 ◽  
Vol 387 ◽  
Author(s):  
Peter Y. Wong ◽  
Ioannis N. Miaoulis ◽  
Cynthia G. Madras
Keyword(s):  
Heat Transfer ◽  
Heat Source ◽  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Temporal Variations ◽  
Radiative Properties ◽  
Wafer Surface ◽  
Patterned Wafers ◽  
Thermal Radiative Properties ◽  
Dynamic Variations

AbstractTemperature measurements and processing uniformity continue to be major issues in Rapid Thermal Processing. Spatial and temporal variations in thermal radiative properties of the wafer surface are sources of non-uniformities and dynamic variations. These effects are due to changes in spectral distribution (wafer or heat source), oxidation, epitaxy, silicidation, and other microstructural transformations. Additionally, other variations are induced by the underlying (before processing) and developing (during processing) patterns on the wafer. Numerical simulations of Co silicidation that account for these factors are conducted to determine the radiative properties, heat transfer dynamics, and resultant processing uniformity.

Ripple Technique; a Novel Non-Contact Wafer Emissivity and Temperature Method for RTP

1991 ◽  
Vol 224 ◽  
Author(s):  
C. Schietinger ◽  
B. Adams ◽  
C. Yarling
Keyword(s):  
Optical Fiber ◽  
Measurement Technique ◽  
Thermal Processing ◽  
High Speed ◽  
Rapid Thermal Processing ◽  
Wafer Surface ◽  
Speed Measurement ◽  
Temperature Method ◽  
Emissivity Measurement ◽  
Emissivity Measurements

AbstractA novel wafer temperature and emissivity measurement technique for rapid thermal processing (RTP) is presented. The ‘Ripple Technique’ takes advantage of heating lamp AC ripple as the signature of the reflected component of the radiation from the wafer surface. This application of Optical Fiber Thermometry (OFT) allows high speed measurement of wafer surface temperatures and emissivities. This ‘Ripple Technique’ is discussed in theoretical and practical terms with wafer data presented. Results of both temperature and emissivity measurements are presented for RTP conditions with bare silicon wafers and filmed wafers.

An Electrical Characterization of Sol Films Using Devices Formed by Oxygen Implant and Rapid Thermal Processing

1987 ◽  
Vol 92 ◽  
Author(s):  
Jim D. Whitfield ◽  
Marie E. Burnham ◽  
Charles J. Varker ◽  
Syd.R. Wilson
Keyword(s):  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
High Energy ◽  
Thermally Grown Oxide ◽  
Silicon On Insulator ◽  
Wafer Surface ◽  
High Dose ◽  
Active Device ◽  
Insulating Layer ◽  
Oxygen Implantation

The advantages of Silicon-on-Insulator (SO) devices over bulk Silicon devices are well known (speed, radiation hardened, packing density, latch up free CMOS,). In recent years, much effort has been made to form a thin, buried insulating layer just below the active device region. Several approaches are being developed to fabricate such a buried insulating layer. One viable approach is by high dose, high energy oxygen implantation directly into the silicon wafer surface (1-3). With proper implant and annealing conditions, a thin stoichiometric buried oxide with a good crystalline quality silicon overlayer can be formed on which an epitaxial layer can be grown and functional devices and circuits built. As SO1 circuits become market viable, mass production tools and techniques are being developed and evaluated. Of particular interest here is the evaluation of high current oxygen implantation with rapid thermal processing on the electrical characteristics of the oxide-silicon interfaces, the silicon overlayer and the thermally grown oxide on the top surface using measurements on gated diodes and guarded capacitors.

Characterization of PSG Films Reflowed in Steam Using Rapid Thermal Processing

1985 ◽  
Vol 52 ◽  
Author(s):  
N. Shah ◽  
J. M. C. Vittie ◽  
N. Sharif ◽  
J. Nulman ◽  
A. Gat
Keyword(s):  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Operating Regime ◽  
Junction Depth ◽  
Thermal Oxide ◽  
Rapid Thermal Annealer ◽  
Flow Cycle ◽  
Phosphosilicate Glass

ABSTRACTThis study describes the use of a steam environment to reflow phosphosilicate glass (PSG) samples using a HEATPULSE® rapid thermal annealer. The samples comprised PSG over poly steps and of open contacts in PSG. It was observed that reflow occurs 50°C lower in steam than in dry O2. An acceptable flow cycle for 8 w/o P in PSG glass is 1050°C for 10 seconds in steam, while for 6 w/o P PSG it is 1100°C for 10 seconds. Steam is found to be an effective amibient for densification of the PSG film. The thermal oxide grown in the contact during opening reflow was determined to be near 140 A. The operating regime for a junction depth <0.4 um and a reflow angle < 75° is presented for 8 w/o P.

Transient Thermal Analysis for Rapid Thermal Processing of GaAs

1988 ◽  
Vol 144 ◽  
Author(s):  
F. K. Yang ◽  
S. J. Pien ◽  
R. Kwor
Keyword(s):  
Thermal Analysis ◽  
Silicon Dioxide ◽  
Oxide Layer ◽  
Thermal Processing ◽  
Rapid Heating ◽  
Rapid Thermal Processing ◽  
Doping Effect ◽  
Heating Process ◽  
Light Sources ◽  
Transient Thermal

ABSTRACTA thermal analysis is performed to simulate the rapid heating process for ion implanted GaAs with consideration of the doping effect. The results are for cases with various concentrations and thicknesses of doping layer. Also studied are the heating processes for silicon dioxide capped GaAs. The effects of the thickness of the oxide layer are discussed. The magnitude of the temperature differences across the wafer is addressed. The present analysis considers xenon-arc lamps and tungsten-halogen lamps as the light sources.

scholarly journals Simulation of silicon wafers heating during rapid thermal processing using “UBTO 1801” unit

Doklady BGUIR ◽  
2020 ◽  
Vol 18 (7) ◽  
pp. 79-86
Author(s):  
J. A. Solovjov ◽  
V. A. Pilipenko ◽  
V. P. Yakovlev
Keyword(s):  
Mathematical Model ◽  
Silicon Wafer ◽  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Light Flux ◽  
Silicon Wafers ◽  
Wafer Surface ◽  
Constant Density ◽  
Wafer Temperature

The present work is devoted to determination of the dependence of the heating temperature of the silicon wafer on the lamps power and the heating time during rapid thermal processing using “UBTO 1801” unit by irradiating the wafer backside with an incoherent flow of constant density light. As a result, a mathematical model of silicon wafer temperature variation was developed on the basis of the equation of nonstationary thermal conductivity and known temperature dependencies of the thermophysical properties of silicon and the emissivity of aluminum and silver applied to the planar surface of the silicon wafer. For experimental determination of the numerical parameters of the mathematical model, silicon wafers were heated with light single pulse of constant power to the temperature of one of three phase transitions such as aluminum-silicon eutectic formation, aluminum melting and silver melting. The time of phase transition formation on the wafer surface during rapid thermal processing was fixed by pyrometric method. In accordance with the developed mathematical model, we determined the conversion coefficient of the lamps electric power to the light flux power density with the numerical value of 5.16∙10-3 cm-2 . Increasing the lamps power from 690 to 2740 W leads to an increase in the silicon wafer temperature during rapid thermal processing from 550°to 930°K, respectively. With that, the wafer temperature prediction error in compliance with developed mathematical model makes less than 2.3 %. The work results can be used when developing new procedures of rapid thermal processing for silicon wafers.

Effect of doping level during rapid thermal processing of multilayer structures

1999 ◽  
Vol 14 (6) ◽  
pp. 2402-2410 ◽  
Author(s):  
A. R. Abramson ◽  
P. Nieva ◽  
H. Tada ◽  
P. Zavracky ◽  
I. N. Miaoulis ◽  
...  
Keyword(s):  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Temperature History ◽  
Multilayer Structures ◽  
Interference Effects ◽  
Heating Rates ◽  
History Of ◽  
Heavily Doped ◽  
Thin Film Interference ◽  
Maximum Heating

A numerical model has been developed to examine the temperature history of a multilayer wafer undergoing rapid thermal processing (RTP) for various doping densities. Partial transparency and thin film interference effects are considered. Doping levels from ∼1015 to ∼1018 cm−3 are examined. Numerical temperature predictions of the lightly doped wafer are compared with experimental measurements. Heating rates for the lightly doped wafer fluctuate due to partial transparency effects and reach a maximum of ∼50 °C/s. The heavily doped wafer sees a maximum heating rate of ∼100 °C/s. Because the wafers are opaque above 700 °C regardless of their level of doping, all wafers reach steady state at ∼845 °C.

Deep Diffusions and Soi Layers Produced by Rapid Thermal Processing for Smart Power Applications

1997 ◽  
Vol 470 ◽  
Author(s):  
J-M. Dilhac ◽  
L. Cornibert ◽  
C. Ganibal
Keyword(s):  
Thermal Processing ◽  
Thermal Gradient ◽  
Rapid Thermal Processing ◽  
Zone Melting ◽  
Wafer Surface ◽  
Molten Silicon ◽  
Power Devices ◽  
Smart Power ◽  
Gradient Zone ◽  
Si Wafer

ABSTRACTPower devices often contain very deep boron diffusions extending through the thickness of the wafer to create junction isolation. In this paper we first report our investigations to replace the standard solid-state deep diffusion, with Temperature-Gradient Zone Melting (TGZM). During TGZM, a molten silicon/aluminium solution moves through a Si wafer in minutes, leaving a highly Al doped trail behind it. The liquid phase diffusion is driven by the vertical thermal gradient created in the wafer by a properly designed RTP.On the other hand, for the purpose of high voltage (> 400V) smart power applications, substrates with localised and thick SOI layers are needed. We also present a method for recrystallization of thick poly silicon films by Lateral Epitaxial Growth over Oxide (LEGO), using a similarly designed RTP.The two processes, that is LEGO and TGZM, use a Rapid Thermal Processor and are compatible. The RTP is specially designed to create a thermal gradient perpendicular to the wafer surface.

Transient and Spatial Radiative Properties of Patterned Wafers during Rapid Thermal Processing

1995 ◽  
Vol 389 ◽  
Author(s):  
Peter Y. Wong ◽  
Ioannis N. Miaoulis ◽  
Cynthia G. Madras
Keyword(s):  
Heat Transfer ◽  
Heat Source ◽  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Temporal Variations ◽  
Radiative Properties ◽  
Wafer Surface ◽  
Patterned Wafers ◽  
Thermal Radiative Properties ◽  
Dynamic Variations

ABSTRACTTemperature measurements and processing uniformity continue to be major issues in Rapid Thermal Processing. Spatial and temporal variations in thermal radiative properties of the wafer surface are sources of non-uniformities and dynamic variations. These effects are due to changes in spectral distribution (wafer or heat source), oxidation, epitaxy, silicidation, and other microstructural transformations. Additionally, other variations are induced by the underlying (before processing) and developing (during processing) patterns on the wafer. Numerical simulations of Co silicidation that account for these factors are conducted to determine the radiative properties, heat transfer dynamics, and resultant processing uniformity.

Properties of Thin Inter-Polysilicon Reoxidized Nitrided Oxides Prepared by Rapid Thermal Processing (RTO/RTN/RTO)

1989 ◽  
Vol 146 ◽  
Author(s):  
Andrew W. Cheung ◽  
G. Q. Lo ◽  
Dim-Lee Kwong ◽  
N. S. Alvi ◽  
A. Kermani
Keyword(s):  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Dielectric Strength ◽  
Breakdown Field ◽  
Low Leakage ◽  
Low Leakage Current ◽  
Thermal Oxide ◽  
Non Volatile Memory ◽  
Thermal Nitridation ◽  
Memory Applications

ABSTRACTIn the search of a high quality thin inter-polysilicon dielectric which has high breakdown voltage and low leakage current for high density non-volatile memory applications, thin (150±) inter-polysilicon reoxidized nitrided oxide capacitors were fabricated with multiple rapid thermal processing. While rapid thermal nitridation degraded the breakdown field if compared to the rapid thermal oxide capacitors, rapid thermal reoxidation greatly enhanced the dielectric strength of the rapid thermal nitrided samples. The short reoxidations increased the film thickness by less than 10 \. Breakdown field of optimized inter-polysilicon RTO/RTN/RTO capacitors up to 14 MV/cm has been measured.

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