Silicidation Strategy Of Sub-0.1 μm Junctions for Deep Submicron Devices

1995 ◽  
Vol 402 ◽  
Author(s):  
Jiunn-Yann Tsai ◽  
Carlton M. Osburn ◽  
Steve L. Hsia
Keyword(s):  
Series Resistance ◽  
Deep Submicron ◽  
Silicon On Insulator ◽  
Promising Alternative ◽  
Resistance Increase ◽  
Low Leakage ◽  
Submicron Devices ◽  
Diffusion Source ◽  
Ultra Shallow Junctions ◽  
Silicon Interface

AbstractTwo major concerns for silicidation of ultra-shallow junctions, namely the silicon-consumption- induced junction leakage and the series resistance increase, were compared among conventional post-junction-silicide (PJS) contact, silicide-as-a-diffusion-source (SADS) contact, Silicon-On-Insulator (SOI) contact, and elevated-source-drain (ESD) contact. Even though we found that ESD contacts would be the ultimate solution for both problems, SOI and SADS contacts provide better resistance to silicon-consumption-induced series resistance increase over conventional PJS contact because both are able to maintain a high dopant concentration at the silicide/silicon interface and thus a low specific contact resistivity. While there is no junction leakage concern for SOI contact, the SADS junction is also distinguished by low leakage owing to its lack of implant damage in the silicon substrate and uniformly doped junction along the silicide/silicon interface contour. MOSFET devices with SADS source/drain were demonstrated with quarter-μm technology. Epitaxial cobalt disilicide (CoSi2) was formed using the Ti/Co bilayer technique as a diffusion source. While both ESD and SOI processes still suffer from process complexity, integration and materials issues, we conclude that SADS contacting is a promising alternative for deep submicron devices.

Behavior of contact-silicided TFSOI gate structures

1994 ◽  
Vol 52 ◽  
pp. 860-861
Author(s):  
N. David Theodore ◽  
Juergen Foerstner ◽  
Peter Fejes
Keyword(s):  
Semiconductor Device ◽  
Series Resistance ◽  
Field Effect Transistors ◽  
Silicon Layer ◽  
Device Fabrication ◽  
Silicon On Insulator ◽  
Continuous Layer ◽  
Buried Oxide ◽  
Device Structures ◽  
Thin Silicon

As semiconductor device dimensions shrink and packing-densities rise, issues of parasitic capacitance and circuit speed become increasingly important. The use of thin-film silicon-on-insulator (TFSOI) substrates for device fabrication is being explored in order to increase switching speeds. One version of TFSOI being explored for device fabrication is SIMOX (Silicon-separation by Implanted OXygen).A buried oxide layer is created by highdose oxygen implantation into silicon wafers followed by annealing to cause coalescence of oxide regions into a continuous layer. A thin silicon layer remains above the buried oxide (~220 nm Si after additional thinning). Device structures can now be fabricated upon this thin silicon layer.Current fabrication of metal-oxidesemiconductor field-effect transistors (MOSFETs) requires formation of a polysilicon/oxide gate between source and drain regions. Contact to the source/drain and gate regions is typically made by use of TiSi2 layers followedby Al(Cu) metal lines. TiSi2 has a relatively low contact resistance and reduces the series resistance of both source/drain as well as gate regions

New Measurement Method for Self-Heating in Silicon-on-Insulator MOSFETs Based on Shared Series Resistance

2020 ◽  
Vol 41 (2) ◽  
pp. 212-215
Author(s):  
Wangyong Chen ◽  
Linlin Cai ◽  
Yongfeng Cao ◽  
Duanquan Liao ◽  
Ming Tian ◽  
...  
Keyword(s):  
Measurement Method ◽  
Series Resistance ◽  
Silicon On Insulator ◽  
Self Heating

Grain Quality Enhancement of Nickel-Crystallized Polysilicon Film in Quantum-Wire-Like Structures

2001 ◽  
Vol 686 ◽  
Author(s):  
Hongmei Wang ◽  
Singh Jagar ◽  
N. Zhan ◽  
C. F. Cheng ◽  
M. C. Poon ◽  
...  
Keyword(s):  
High Temperature ◽  
Quantum Wire ◽  
Grain Quality ◽  
Small Dimension ◽  
Deep Submicron ◽  
Current Drive ◽  
Silicon On Insulator ◽  
Polysilicon Film ◽  
Crystallization Procedure ◽  
Lateral Crystallization

AbstractMethods for forming high quality re-crystallizing polysilicon films are being actively studied due to their ability to provide significant improvement to polysilicon Thin-Film-Transistors (TFT). Recently, a simple Metal-Induced-Lateral-Crystallization (MILC) method with nickel, together with high temperature annealing, can result in single crystal like polysilicon film [1]. TFTs fabricated on this so-called Large-grain Silicon-On-Insulator (LPSOI) can achieve SOI MOSFET performance especially for making small dimension devices. This paper reports that the polysilicon grain quality can be further enhanced by crystallizing the polysilicon film into the shape of long-wire.The crystallization procedure started with a regular Nickel-Induced-Lateral-Crystallization (NILC) process at 560 °C as described in [1]. The film was then etched into narrow wires, which were parallel to the direction of nickel propagation. The NILC second anneal at 900 °C was then performed on these silicon wire. Through surface energy anisotropy stimulated grain expansion in the NILC high-temperature second annealing, enhanced grain quality beyond that on planar polysilicon film.Transistor fabricated on these wire is similar to gate-all-around structure as that of FinFET [2]. Much better scalability to the deep submicron region was observed for these wire transistors than regular planar TFTs formed on the same NILC film. Experimental results showed that a wide transistor formed by the parallel combination of the quantum wire transistors much higher current drive than a TFT on the same NILC film with equivalent width.

Suppression of boron diffusion in deep submicron devices

2011 ◽  
Vol 29 (6) ◽  
pp. 062201 ◽  
Author(s):  
Michael A. Gribelyuk ◽  
Phil Oldiges ◽  
Paul A. Ronsheim ◽  
Jun Yuan ◽  
Leon Kimball
Keyword(s):  
Deep Submicron ◽  
Boron Diffusion ◽  
Submicron Devices

Schottky-barrier height tuning using dopant segregation in Schottky-barrier MOSFETs on fully-depleted SOI

2006 ◽  
Vol 913 ◽  
Author(s):  
Joachim Knoch ◽  
Min Zhang ◽  
Qing-Tai Zhao ◽  
Siegfried Mantl
Keyword(s):  
Schottky Barrier ◽  
Barrier Height ◽  
Field Effect Transistors ◽  
Interface Layer ◽  
Silicon On Insulator ◽  
Oxide Semiconductor ◽  
Fully Depleted ◽  
Dopant Segregation ◽  
P Type ◽  
Silicon Interface

AbstractIn this paper we demonstrate the use of dopant segregation during silicidation for decreasing the effective potential barrier height in Schottky-barrier metal-oxide-semiconductor field-effect-transistors (SB-MOSFETs). N-type as well as p-type devices are fabricated with arsenic/boron implanted into the device's source and drain regions prior to silicidation. During full nickel silicidation a highly doped interface layer is created due to dopants segregating at the silicide-silicon interface. This doped layer leads to an increased tunneling probability through the Schottky barrier and hence leads to significantly improved device characteristics. In addition, we show with simulations that employing ultrathin body (UTB) silicon-on-insulator and ultrathin gate oxides allows to further improve the device characteristics.

Ultra-Low Leakage Silicon-on-Insulator Technology for 65 nm Node and Beyond

2007 ◽  
Author(s):  
Jin Cai ◽  
Amlan Majumdar ◽  
David Dobuzinsky ◽  
Tak H. Ning ◽  
Steven J. Koester ◽  
...  
Keyword(s):  
Silicon On Insulator ◽  
Low Leakage ◽  
Silicon On Insulator Technology

Low Temperature Deposition of High Dielectric Constant Thin Films for Decoupling Capacitor Applications

1990 ◽  
Vol 203 ◽  
Author(s):  
P. Li ◽  
B. Gittleman ◽  
T.-M. Lu
Keyword(s):  
Thin Films ◽  
Dielectric Constant ◽  
Leakage Current ◽  
High Dielectric Constant ◽  
Promising Alternative ◽  
Low Leakage ◽  
Low Leakage Current ◽  
Annealing Effects ◽  
Temperature Deposition ◽  
High Dielectric

ABSTRACTHigh dielectric constant thin films for packaging applications were studied. Compared with polycrystalline or epitaxial ferroelectric thin films amorphous ferroelectric films are a promising alternative because of their ease of processing and low leakage current. Reactive Partially Ionized Beam deposition (RPIB) offers a new approach to deposit high dielectric constant films at a low substrate temperature. As an example, the growth of amorphous BaTiOs thin films using RPIB deposition is described. The films were characterized in terms of dielectric constant and leakage current. The annealing effects on the film properties are also discussed.

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