Determination of the Defect Redistribution and Charge Injection Contributions to the a-Si:H Thin-Film Transistor Instability

1994 ◽  
Vol 336 ◽  
Author(s):  
R. Carluccio ◽  
A. Pecora ◽  
D. Massimiani ◽  
G. Fortunato

ABSTRACTThe effects of bias-stressing n- and p-channel thin-film transistors, employing thermal silicon dioxide as gate insulator, have been analysed by using different techniques, including field-effect, space-charge photomodulation and photo-induced discharge. Photo-induced discharge experiments have pointed out as parasitic resistance effects can be present in p-channel devices. In order to reduce this problem, thin active layer p-channel devices have been fabricated and, combining these results to those relative to the n-channel transistors, we deduced a predominance of charge injection at low and moderate stress-biases while at high-stress biases modifications in the density of states take place.

2013 ◽  
Vol 2013 ◽  
pp. 1-8 ◽  
Author(s):  
P. T. Tue ◽  
T. Miyasako ◽  
E. Tokumitsu ◽  
T. Shimoda

We adopted a lanthanum oxide capping layer between semiconducting channel and insulator layers for fabrication of a ferroelectric-gate thin-film transistor memory (FGT) which uses solution-processed indium-tin-oxide (ITO) and lead-zirconium-titanate (PZT) film as a channel layer and a gate insulator, respectively. Good transistor characteristics such as a high “on/off” current ratio, high channel mobility, and a large memory window of 108, 15.0 cm2 V−1 s−1, and 3.5 V were obtained, respectively. Further, a correlation between effective coercive voltage, charge injection effect, and FGT’s memory window was investigated. It is found that the charge injection from the channel to the insulator layer, which occurs at a high electric field, dramatically influences the memory window. The memory window’s enhancement can be explained by a dual effect of the capping layer: (1) a reduction of the charge injection and (2) an increase of effective coercive voltage dropped on the insulator.


2021 ◽  
Vol 9 (11) ◽  
pp. 1095-1101
Author(s):  
Debabrata Bhadra ◽  

Thin-film transistor (TFT) with various layers of crystalline Poly-vinylidene fluoride (PVDF)/CuO percolative nanocomposites based on Anthracene as a gate dielectric insulator have been fabricated. A device with excellent electrical characteristics at low operating voltages (<1V) has been designed. Different layers (L) of the film were also prepared to achieve the best optimization of ideal gate insulator with various static dielectric constants (εr). Capacitance density, leakage current at 1V gate voltage and electrical characteristics of OFETs with a single and multi layer films have been investigated. This device was showed highest field effect mobility of 2.27 cm2/Vs, a threshold voltage of -1.6V, an exceptionally low sub threshold slope of 380 mV/decade and an on/off ratio of 106. Such a High-ε three layered (3L) PVDF/CuO gate dielectric appears to be highly promising candidates for organic non-volatile memory, sensor and field-effect transistors (FETs).


1992 ◽  
Vol 258 ◽  
Author(s):  
P. Foglietti ◽  
G. Fortunato ◽  
L. Mariucci ◽  
V. Parisi

ABSTRACTIn the present work, in order to discriminate the main source of instability in a-Si:H TFTs, the determination of both threshold voltage and flat-band voltage has been performed after bias-stressing the devices with different gate voltages and at different temperatures. Flat-band voltage was determined by the space-charge photomodulation technique. From the close correlation observed between the two quantities, we conclude that the predominant instability mechanism is represented by change in the gate insulator charge at and near the semiconductor/insulator interface.


Electronics ◽  
2021 ◽  
Vol 10 (2) ◽  
pp. 200
Author(s):  
Do Won Kim ◽  
Hyeon Joong Kim ◽  
Changmin Lee ◽  
Kyoungdu Kim ◽  
Jin-Hyuk Bae ◽  
...  

Sol-gel processed SnO2 thin-film transistors (TFTs) were fabricated on SiO2/p+ Si substrates. The SnO2 active channel layer was deposited by the sol-gel spin coating method. Precursor concentration influenced the film thickness and surface roughness. As the concentration of the precursor was increased, the deposited films were thicker and smoother. The device performance was influenced by the thickness and roughness of the SnO2 active channel layer. Decreased precursor concentration resulted in a fabricated device with lower field-effect mobility, larger subthreshold swing (SS), and increased threshold voltage (Vth), originating from the lower free carrier concentration and increase in trap sites. The fabricated SnO2 TFTs, with an optimized 0.030 M precursor, had a field-effect mobility of 9.38 cm2/Vs, an SS of 1.99, an Ion/Ioff value of ~4.0 × 107, and showed enhancement mode operation and positive Vth, equal to 9.83 V.


1993 ◽  
Vol 297 ◽  
Author(s):  
Byung Chul Ahn ◽  
Jeong Hyun Kim ◽  
Dong Gil Kim ◽  
Byeong Yeon Moon ◽  
Kwang Nam Kim ◽  
...  

The hydrogenation effect was studied in the fabrication of amorphous silicon thin film transistor using APCVD technique. The inverse staggered type a-Si TFTs were fabricated with the deposited a-Si and SiO2 films by the atmospheric pressure (AP) CVD. The field effect mobility of the fabricated a-Si TFT is 0.79 cm2/Vs and threshold voltage is 5.4V after post hydrogenation. These results can be applied to make low cost a-Si TFT array using an in-line APCVD system.


2017 ◽  
Vol 28 (17) ◽  
pp. 175201 ◽  
Author(s):  
Hyunsuk Woo ◽  
Taeho Kim ◽  
Jihyun Hur ◽  
Sanghun Jeon

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