Effect of GaAs Surface Stoichiometry on The Interface of As-Grown Epitaxial ZnSe/Epitaxial GaAs Heterostructures

1989 ◽  
Vol 161 ◽  
Author(s):  
J. Qiu ◽  
R.L. Gunshor ◽  
M. Kobayashi ◽  
D.R. Menke ◽  
Q.-D. Qian ◽  
...  

ABSTRACTIn the study reported here, the GaAs surface stoichiometry was systematically varied prior to the nucleation of ZnSe to form epitaxial ZnSe/epitaxial GaAs interfaces. The structures were grown by molecular beam epitaxy and evaluated by several techniques including capacitance-voltage (C-V) measurements. A dramatic reduction of interface state density occurred when the GaAs epilayer was made As deficient. The resulting interface state densities of as-grown structures are comparable to values obtained with (Al,Ga)As/GaAs interfaces.

1996 ◽  
Vol 421 ◽  
Author(s):  
M. Passlack ◽  
M. Hong

AbstractWe have extended the spectrum of molecular-beam epitaxy (MBE) related techniques by introducing in-situ deposition of oxides. The oxide films have been deposited on clean, atomically ordered (100) GaAs wafer surfaces using molecular beams of gallium-, magnesium-, silicon-, or aluminum oxide. Among the fabricated oxide-GaAs heterostructures, Ga2O3-GaAs interfaces exhibit unique electronic properties including an interface state density Dit in the low 1010 cm−2eV−1 range and an interface recombination velocity S of 4000 cm/s. The formation of inversion layers in both n- and p-type GaAs has been clearly established. Further, thermodynamic and photochemical stability of excellent electronic interface properties of Ga2O3-GaAs structures has been demonstrated.


1990 ◽  
Vol 56 (13) ◽  
pp. 1272-1274 ◽  
Author(s):  
J. Qiu ◽  
Q.‐D. Qian ◽  
R. L. Gunshor ◽  
M. Kobayashi ◽  
D. R. Menke ◽  
...  

1994 ◽  
Vol 347 ◽  
Author(s):  
P. C. Chen ◽  
J. Y. Lin ◽  
H. L. Hwang

ABSTRACTFundamental characteristics such as the oxide breakdown fields, oxide charges and interface state density of various ultra-thin silicon oxides (≤ 8 nm) grown by microwave plasma afterglow oxidation at low temperatures (400 °C and 600 °C) were investigated. The effective Oxide charge density of 600 °C as-grown oxide was as low as 6×1010 cm-2. The breakdown fields of the oxides were further enhanced and the interface state densities were reduced by employing fluorination (HF soaked) and low temperature N2O plasma annealing. The breakdown field of the thin oxide grown at 600 °C with 15 min N2O plasma annealing was 12 MV/cm. The reduction of interface state density was about 35% for 600 °C fluorinated oxide. When integrated with poly-gate process, the interface state density was as low as 5×1010 cm-2eV-1.


1996 ◽  
Vol 448 ◽  
Author(s):  
Y.M. Hsin ◽  
N. Y. Li ◽  
C. W. Tu ◽  
P. M. Asbeck

AbstractWe have studied the etching effect of AlxGa1-xAs (0≤ x ≤ 0.5) by trisdimethylaminoarsenic (TDMAAs) at different substrate temperatures, and the quality of the resulting etched/regrown GaAs interface. We find that the etching rate of AlxGa1-x As decreases with increasing Al composition, and the interface trap density of the TDMAAs etched/regrown interface can be reduced by about a factor of 10 as deduced from capacitance-voltage carrier profiles. A smooth surface morphology of GaAs with an interface state density of 1.4×l011 cm−2 can be obtained at a lower in-situ etching temperature of 550°C. Moreover, by using this in-situ etching the I-V characteristics of regrown p-n junctions of Al0.35Ga0.65As/Al0.25Ga0.75As and Al0.35Ga0.65As/GaAs can be improved.


2008 ◽  
Vol 600-603 ◽  
pp. 679-682 ◽  
Author(s):  
Masato Noborio ◽  
Jun Suda ◽  
Tsunenobu Kimoto

Deposited SiN/SiO2 stack gate structures have been investigated to improve the 4H-SiC MOS interface quality. Capacitance-voltage measurements on fabricated SiN/SiO2 stack gate MIS capacitors have indicated that the interface state density is reduced by post-deposition annealing in N2O at 1300°C. The usage of thin SiN and increase in N2O-annealing time lead to a low interface state density of 1×1011 cm-2eV-1 at EC – 0.2 eV. Oxidation of the SiN during N2O annealing has resulted in improvement of SiC MIS interface. The fabricated SiN/SiO2 stack gate MISFETs demonstrate a high channel mobility of 32 cm2/Vs on (0001)Si face and 40 cm2/Vs on (000-1)C face.


2019 ◽  
Vol 35 (3) ◽  
pp. 415-430 ◽  
Author(s):  
Eamon O'Connor ◽  
Vladimir Djara ◽  
Scott Monaghan ◽  
Paul Hurley ◽  
Karim Cherkaoui

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