Decrease in Minority Carrier Lifetime of Crystalline Silicon Caused by Rapid Heating

2012 ◽  
Vol 1426 ◽  
pp. 353-358
Author(s):  
Toshiyuki Sameshima ◽  
Kochi Betsuin ◽  
Shinya Yoshidomi
Keyword(s):  
Laser Heating ◽  
Minority Carrier ◽  
Crystalline Silicon ◽  
Rapid Heating ◽  
Silicon Substrates ◽  
Light Illumination ◽  
Effective Lifetime ◽  
Type Silicon ◽  
Defect Sites ◽  
P Type

ABSTRACTChange in the light-induced minority carrier effective lifetime τeff of crystalline silicon caused by rapid laser heating is reported. The top surface of n- and p-type silicon substrates with thicknesses of 520 μm coated with thermally grown SiO2 layers were heated by a 940 nm semiconductor laser for 4 ms. τeff was measured by a method of microwave absorption caused by carriers induced by 620 nm light illumination at 1.5 mW/cm2. τeff for light illumination of the top surfaces was decreased to 1.0x10-5 and 4.8x10-6 s by laser heating at 5.0x104 W/cm2 for n- and ptype 520-μm-thick silicon substrates, respectively. The decrease in τeff resulted from the generation of defect states associated with the carrier recombination velocity at the top surface region, Stop. Laser heating increased Stop to 6000 and 10000 cm/s for n- and p-type silicon samples, respectively. Heat treatment at 400oC for 4h markedly decreased Stop to 21 and 120 cm/s, respectively, for n- and p-type silicon samples heated at 5.0x104 W/cm2. Laser heating at 4.0x104 W/cm2 for 4 ms was also applied to samples treated with Ar plasma irradiation at 50 W for 60 s, which decreased τeff (top) to 2.0x10-5 s and 3.9x10-6 s for n- and p-type silicon samples, respectively. Laser heating successfully increased τeff (top) to 2.8x10-3 and 4.1x10-4 s for n- and p-type samples, respectively. Laser irradiation at 4x104 W/cm2played a role of curing recombination defect sites.

Passivation of Silicon Surfaces by Treatment in Water at 110°C

2015 ◽  
Vol 1770 ◽  
pp. 37-42 ◽  
Author(s):  
Tomohiko Nakamura ◽  
Toshiyuki Sameshima ◽  
Masahiko Hasumi ◽  
Tomohisa Mizuno
Keyword(s):  
Solar Cell ◽  
Liquid Water ◽  
Crystalline Silicon ◽  
Surface Recombination ◽  
Minority Carrier Lifetime ◽  
Open Circuit ◽  
Silicon Surfaces ◽  
Silicon Substrates ◽  
Light Illumination ◽  
P Type

ABSTRACTWe report effective passivation of silicon surfaces by heating single crystalline silicon substrates in liquid water at 110°C for 1 h. High values of photo-induced effective minority carrier lifetime τeff in the range from 1.9x10-4 to 1.8x10-3 s were obtained for the n-type samples with resistivity in the range from 1.7 to 18.1 Ωcm. τeff ranged from 8.3x10-4 to 3.1x10-3 s and from 1.2x10-4 to 6.0x10-4 s over the area of 4 inch sized 17.0 Ωcm n- and 15.0 Ωcm p-type samples, respectively. The heat treatment in liquid water at 110°C for 1 h resulted in low surface recombination velocities ranging from 7 to 34 cm/s and from 49 to 250 cm/s for those 4 inch sized n- and p-type samples, respectively. The thickness of the passivation layer was estimated to be approximate only 0.7 nm. Metal-insulator-semiconductor type solar cell was demonstrated with Al and Au metal formation on the passivated surface. Rectified current voltage and solar cell characteristics were observed. Open circuit voltage of 0.47 V was obtained under AM 1.5 light illumination at 100 mW/cm2.

Carrier Lifetime Measurements by Photoconductance at Low Temperature on Passivated Crystalline Silicon Wafers

2013 ◽  
Vol 1536 ◽  
pp. 119-125 ◽  
Author(s):  
Guillaume Courtois ◽  
Bastien Bruneau ◽  
Igor P. Sobkowicz ◽  
Antoine Salomon ◽  
Pere Roca i Cabarrocas
Keyword(s):  
Low Temperature ◽  
Electron Mobility ◽  
Carrier Density ◽  
Carrier Lifetime ◽  
Minority Carrier ◽  
Crystalline Silicon ◽  
Silicon Wafers ◽  
Doping Density ◽  
Lifetime Measurements ◽  
Effective Lifetime

ABSTRACTWe propose an implementation of the PCD technique to minority carrier effective lifetime assessment in crystalline silicon at 77K. We focus here on (n)-type, FZ, polished wafers passivated by a-Si:H deposited by PECVD at 200°C. The samples were immersed into liquid N2 contained in a beaker placed on a Sinton lifetime tester. Prior to be converted into lifetimes, data were corrected for the height shift induced by the beaker. One issue lied in obtaining the sum of carrier mobilities at 77K. From dark conductance measurements performed on the lifetime tester, we extracted an electron mobility of 1.1x104 cm².V-1.s-1 at 77K, the doping density being independently calculated in order to account for the freezing effect of dopants. This way, we could obtain lifetime curves with respect to the carrier density. Effective lifetimes obtained at 77K proved to be significantly lower than at RT and not to depend upon the doping of the a-Si:H layers. We were also able to experimentally verify the expected rise in the implied Voc, which, on symmetrically passivated wafers, went up from 0.72V at RT to 1.04V at 77K under 1 sun equivalent illumination.

Efficient lateral minority carrier transport in proton‐implanted p‐type silicon

1995 ◽  
Vol 67 (1) ◽  
pp. 88-90 ◽  
Author(s):  
D. C. Leung ◽  
P. R. Nelson ◽  
O. M. Stafsudd ◽  
J. B. Parkinson ◽  
G. E. Davis
Keyword(s):  
Carrier Transport ◽  
Minority Carrier ◽  
Type Silicon ◽  
P Type

The effect of oxide precipitates on minority carrier lifetime in p-type silicon

2011 ◽  
Vol 110 (5) ◽  
pp. 053713 ◽  
Author(s):  
J. D. Murphy ◽  
K. Bothe ◽  
M. Olmo ◽  
V. V. Voronkov ◽  
R. J. Falster
Keyword(s):  
Carrier Lifetime ◽  
Minority Carrier ◽  
Minority Carrier Lifetime ◽  
Type Silicon ◽  
P Type

Effects of Impurities Distribution on the Crystal Structure and Electrical Properties of Multi-Crystalline Silicon Ingots

2011 ◽  
Vol 675-677 ◽  
pp. 101-104
Author(s):  
Qi Zhi Xing ◽  
Wei Dong ◽  
Shu Ang Shi ◽  
Guo Bin Li ◽  
Yi Tan
Keyword(s):  
Electrical Properties ◽  
Minority Carrier ◽  
Crystalline Silicon ◽  
Melting Furnace ◽  
Minority Carrier Lifetime ◽  
Vacuum Induction Melting ◽  
Induction Melting ◽  
Columnar Crystal ◽  
P Type ◽  
Crystal Region

Multi-crystalline silicon ingots were prepared by directional solidification using vacuum induction melting furnace. The content of aluminum and iron deeply decreased in the columnar crystal region of the multi-crystalline silicon ingots. The columnar crystal growth broke off corresponded to the iron contents sharply increased. The height of columnar crystal in the silicon ingots related to the pulling rates had been clarified by the constitutional supercooling theory. The maximum of the resistivity and the minority carrier lifetime closed to the transition zone where the conductive type changed from p-type to n-type in silicon ingots. Further analysis suggested that the electrical properties were related to the contents of shallow level impurities aluminum, boron and phosphorus.

Minority Carrier Lifetime Behavior in Crystalline Silicon in Rapid Laser Heating

2012 ◽  
Vol 51 ◽  
pp. 03CA04
Author(s):  
Toshiyuki Sameshima ◽  
Koichi Betsuin ◽  
Tomohisa Mizuno ◽  
Naoki Sano
Keyword(s):  
Laser Heating ◽  
Carrier Lifetime ◽  
Minority Carrier ◽  
Crystalline Silicon ◽  
Minority Carrier Lifetime

New Trends in Wide Bandgap Semiconductors: Synthesis of Single Crystalline Silicon Carbide Layers by Low Pressure Chemical Vapor Deposition Technique on P-Type Silicon (100 and/or 111) and their Characterization

2010 ◽  
Vol 442 ◽  
pp. 195-201
Author(s):  
F. Iqbal ◽  
A. Ali ◽  
A. Mehmood ◽  
M. Yasin ◽  
A. Raja ◽  
...  
Keyword(s):  
Chemical Vapor Deposition ◽  
Vapor Deposition ◽  
Crystalline Silicon ◽  
Chemical Vapor ◽  
Low Pressure ◽  
Single Crystalline ◽  
Type Silicon ◽  
Vapor Deposition Technique ◽  
Pressure Chemical ◽  
P Type

We report the growth of SiC layers on low cost p-type silicon (100 and/or 111) substrates maintained at constant temperature (1050 - 1350oC, ∆T=50oC) in a low pressure chemical vapor deposition reactor. Typical Fourier transform infrared spectrum showed a dominant peak at 800 cm-1 due to Si-C bond excitation. Large area x-ray diffraction spectra revealed single crystalline cubic structures of 3C-SiC(111) and 3C-SiC(200) on Si(111) and Si(100) substrates, respectively. Cross-sectional views exposed by scanning electron microscopy display upto 104 µm thick SiC layer. Energy dispersive spectroscopy of the layers demonstrated stiochiometric growth of SiC. Surface roughness and morphology of the films were also checked with the help of atomic force microscopy. Resistivity of the as-grown layers increases with increasing substrate temperature due to decrease of isolated intrinsic defects such as silicon and/or carbon vacanies having activation energy 0.59 ±0.02 eV.

Impact of the Gate Material on the Deep Levels in a-Si:H/c-Si Metal-Insulator-Semiconductor Capacitors

2015 ◽  
Vol 242 ◽  
pp. 61-66
Author(s):  
Eddy Simoen ◽  
Valentina Ferro ◽  
Barry O’Sullivan
Keyword(s):  
Minority Carrier ◽  
Crystalline Silicon ◽  
Deep Level ◽  
Silicon Layer ◽  
Si Substrate ◽  
Metal Insulator ◽  
Metal Insulator Semiconductor ◽  
Transient Spectroscopy ◽  
P Type ◽  
Mis Capacitors

Deep Level Transient Spectroscopy (DLTS) has been applied to Metal-Insulator-Semiconductor (MIS) capacitors, consisting of a p+ or n+ a-Si:H gate on an intrinsic i-a-Si:H passivation layer deposited on crystalline silicon n-or p-type substrates. It is shown that the type of gate has a pronounced impact on the obtained spectra, whereby both the kind of defects (dangling bonds at the a-Si:H/(100) c-Si interface (Pb0 defects) or in the amorphous silicon layer (D defects) and their relative importance (peak amplitude) may be varied. The highest trap densities have been found for the p+ a-Si:H gate capacitors on an n-type Si substrate. In addition, the spectra may exhibit unexpected negative peaks, suggesting minority carrier capture. These features are tentatively associated with interface states at the p+ or n+ a-Si:H/i-a-Si:H interface. Their absence in Al-gate capacitors is in support of this hypothesis.

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