scholarly journals Characterization of Defect Traps in SiO2Thin Films

2001 ◽  
Vol 24 (3) ◽  
pp. 169-175 ◽  
Author(s):  
Jean-Yves Rosaye ◽  
Pierre Mialhe ◽  
Jean-Pierre Charles ◽  
Mitsuo Sakashita ◽  
Hiroya Ikeda ◽  
...  
Keyword(s):  
Metal Oxide ◽  
Measurement Technique ◽  
Temperature Effects ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Hysteresis Cycle ◽  
Fast State ◽  
Mos Devices ◽  
Capacitance Voltage

In order to understand the degradation of the electrical operations of metal-oxide-semiconductor (MOS) devices, this work is concerned by the defects generation processes in the non-stoichiometric SiOx, area and at the SiO2interface. For this purpose, a new measurement technique to study slow-state traps and their relationship with fast-state traps is developed. This method considers capacitance-voltage measurements and temperature effects during the hysteresis cycle.

Characterization of Graphene Gate Electrodes for Metal-Oxide-Semiconductor Devices

MRS Advances ◽  
2017 ◽  
Vol 2 (02) ◽  
pp. 103-108 ◽  
Author(s):  
Yanbin An ◽  
Aniruddh Shekhawat ◽  
Ashkan Behnam ◽  
Eric Pop ◽  
Ant Ural
Keyword(s):  
Metal Oxide ◽  
High Frequency ◽  
Tunneling Current ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Heterogeneous Integration ◽  
Gate Electrodes ◽  
Mos Devices ◽  
Capacitance Voltage

ABSTRACT We fabricate and characterize metal-oxide-semiconductor (MOS) devices with graphene as the gate electrode, 5 or 10 nm thick silicon dioxide as the insulator, and silicon as the semiconductor substrate. We find that Fowler-Nordheim tunneling dominates the gate current for the 10 nm oxide device. We also study the temperature dependence of the tunneling current in these devices in the range 77 to 300 K and extract the effective tunneling barrier height as a function of temperature for the 10 nm oxide device. Furthermore, by performing high frequency capacitance-voltage measurements, we observe a local capacitance minimum under accumulation, particularly for the 5 nm oxide device. By fitting the data using numerical simulations based on the modified density of states of graphene in the presence of charged impurities, we show that this local minimum results from the quantum capacitance of graphene. These results provide important insights for the heterogeneous integration of graphene into conventional silicon technology.

Capacitance–voltage characterization of surface-treated Al2O3/GaN metal–oxide–semiconductor structures

2013 ◽  
Vol 109 ◽  
pp. 10-12 ◽  
Author(s):  
Sung-Bum Bae ◽  
Ki-Won Kim ◽  
Yong Soo Lee ◽  
Jung-Hee Lee ◽  
Youngho Bae ◽  
...  
Keyword(s):  
Metal Oxide ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Semiconductor Structures ◽  
Capacitance Voltage
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