Influence of Cu Electroplating Solution on Self-Assembled Porous Silica Low-k Films

2006 ◽  
Vol 153 (9) ◽  
pp. G870 ◽  
Author(s):  
Masashi Shimoyama ◽  
Ryotaro Yagi ◽  
Shinichi Chikaki ◽  
Nobutoshi Fujii ◽  
Takahiro Nakayama ◽  
...  
Keyword(s):  
Porous Silica ◽  
Cu Electroplating ◽  
Self Assembled ◽  
Low K

Influence of Humidity on Electrical Characteristics of Self-Assembled Porous Silica Low-k Films

2005 ◽  
Vol 152 (7) ◽  
pp. G560 ◽  
Author(s):  
T. Kikkawa ◽  
S. Kuroki ◽  
S. Sakamoto ◽  
K. Kohmura ◽  
H. Tanaka ◽  
...  
Keyword(s):  
Porous Silica ◽  
Electrical Characteristics ◽  
Self Assembled ◽  
Low K

Skeletal Si–O–Si network connectivity of self-assembled porous silica for low-k dielectrics depending on organoalkoxysilane concentration in precursor solutions

2007 ◽  
Vol 101 (6) ◽  
pp. 064301 ◽  
Author(s):  
Syozo Takada ◽  
Nobuhiro Hata ◽  
Kikuko Hayamizu ◽  
Miwa Murakami ◽  
Kenzo Deguchi ◽  
...  
Keyword(s):  
Porous Silica ◽  
Network Connectivity ◽  
Self Assembled ◽  
Low K

Self-assembled ultra-low-k porous silica films for 45-nm technology node

2005 ◽  
Author(s):  
Takamaro Kikkawa ◽  
Y. Oku ◽  
K. Kohmura ◽  
N. Fujii ◽  
H. Tanaka ◽  
...  
Keyword(s):  
Porous Silica ◽  
Silica Films ◽  
Technology Node ◽  
Self Assembled ◽  
Low K

Integration of Self-Assembled Porous Silica in Low-k/Cu Damascene Interconnects

2009 ◽  
Vol 48 (9) ◽  
pp. 095002 ◽  
Author(s):  
Shinichi Chikaki ◽  
Masashi Shimoyama ◽  
Ryotaro Yagi ◽  
Yoshinori Shishida ◽  
Takenobu Yoshino ◽  
...  
Keyword(s):  
Porous Silica ◽  
Self Assembled ◽  
Damascene Interconnects ◽  
Low K

Study of Porous Silica Based Films as Low-k Dielectric Material and their Interface with Copper Metallization

2002 ◽  
Vol 716 ◽  
Author(s):  
Ilanit Fisher ◽  
Wayne D. Kaplan ◽  
Moshe Eizenberg ◽  
Michael Nault ◽  
Timothy Weidman
Keyword(s):  
Integrated Circuits ◽  
Dielectric Material ◽  
Hydrogen Plasma ◽  
Porous Silica ◽  
Film Deposition ◽  
Copper Metallization ◽  
High Porosity ◽  
Tem Analysis ◽  
Chip Technology ◽  
Low K

AbstractThe success of future gigascale integrated circuits (IC) chip technology depends critically upon the reduction of the interconnects RC delay time. This calls for the development of new low dielectric constant (low-k) insulators, and for work on their integration with lower resistivity copper metallization.A porous silica based film prepared by surfactant templated self-assembly spin-on deposition (SOD) is an attractive candidate as a low-k material. In this research we have studied the structure, chemical composition and bonding of the film and its interface with copper metallization. The decomposition and vaporization of the surfactant in the last step of film deposition resulted in a film with an amorphous structure, as determined by XRD and TEM analysis. Its high porosity (35-58%) was confirmed by XRR and RBS measurements. XPS analysis of the Si2p transition indicated three types of bonding: Si-O, O-Si-C and Si-C. The bonding characteristics were also investigated by FTIR analysis. The effect of a hydrogen plasma post-treatment process on the film topography and bonding was determined by AFM and XPS, respectively. It was found that direct H2 plasma exposure significantly affected the surface roughness of the film and type of chemical bonding. The structure and properties of various PECVD deposited capping layers were also studied, as was the interface between the porous dielectric and Ta, TaxN and Cu (PVD deposited films) after annealing at 200-700°C in vacuum environment for 30 min. At temperatures up to 500°C, no significant diffusion of Cu or Ta into the porous film was detected, as determined by RBS. No copper penetration was detected up to 700°C, according to AES and SIMS analysis. However, at 700°C copper dewetting occurred when it was deposited directly on the porous silica based film.

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