Time Dependent MOS Gate Oxide Defects Using Liquid Crystals

1980 ◽  
Vol 127 (4) ◽  
pp. 932-936 ◽  
Author(s):  
A. K. M. Zakzouk
Keyword(s):  
Liquid Crystals ◽  
Gate Oxide ◽  
Time Dependent ◽  
Oxide Defects ◽  
Mos Gate

scholarly journals Time-Dependent Diffusion Coefficients for Chaotic Advection due to Fluctuations of Convective Rolls

Fluids ◽  
2018 ◽  
Vol 3 (4) ◽  
pp. 99 ◽  
Author(s):  
Kazuma Yamanaka ◽  
Takayuki Narumi ◽  
Megumi Hashiguchi ◽  
Hirotaka Okabe ◽  
Kazuhiro Hara ◽  
...  
Keyword(s):  
Diffusion Coefficient ◽  
Liquid Crystals ◽  
Diffusion Coefficients ◽  
Coarse Graining ◽  
Chaotic Advection ◽  
Time Dependent ◽  
Local Order ◽  
Weak Turbulence ◽  
Normal Diffusion ◽  
Convective Rolls

The properties of chaotic advection arising from defect turbulence, that is, weak turbulence in the electroconvection of nematic liquid crystals, were experimentally investigated. Defect turbulence is a phenomenon in which fluctuations of convective rolls arise and are globally disturbed while maintaining convective rolls locally. The time-dependent diffusion coefficient, as measured from the motion of a tagged particle driven by the turbulence, was used to clarify the dependence of the type of diffusion on coarse-graining time. The results showed that, as coarse-graining time increases, the type of diffusion changes from superdiffusion → subdiffusion → normal diffusion. The change in diffusive properties over the observed timescale reflects the coexistence of local order and global disorder in the defect turbulence.

Study of Time Dependent Dielectric Breakdown Distribution in Ultrathin Gate Oxide

2007 ◽  
Vol 46 (No. 28) ◽  
pp. L691-L692 ◽  
Author(s):  
Takashi Miyakawa ◽  
Tsutomu Ichiki ◽  
Junichi Mitsuhashi ◽  
Kazutoshi Miyamoto ◽  
Tetsuo Tada ◽  
...  
Keyword(s):  
Dielectric Breakdown ◽  
Gate Oxide ◽  
Time Dependent ◽  
Time Dependent Dielectric Breakdown

Octahedral-Structured Gigantic Precipitates as the Origin of Gate-Oxide Defects in Metal-Oxide-Semiconductor Large-Scale-Integrated Circuits

1996 ◽  
Vol 35 (Part 1, No. 2B) ◽  
pp. 812-817 ◽  
Author(s):  
Manabu Itsumi ◽  
Hideo Akiya ◽  
Takemi Ueki ◽  
Masato Tomita ◽  
Masataka Yamawaki
Keyword(s):  
Integrated Circuits ◽  
Metal Oxide ◽  
Large Scale ◽  
Gate Oxide ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Oxide Defects

Reliability and Ruggedness of Planar Silicon Carbide MOSFETs

2019 ◽  
Vol 963 ◽  
pp. 782-787
Author(s):  
Kevin Matocha ◽  
In Hwan Ji ◽  
Sauvik Chowdhury
Keyword(s):  
Silicon Carbide ◽  
Threshold Voltage ◽  
Dielectric Breakdown ◽  
Gate Oxide ◽  
Time Dependent ◽  
Gate Bias ◽  
Constant Voltage ◽  
Time Dependent Dielectric Breakdown ◽  
Planar Silicon ◽  
State Of Art

The reliability and ruggedness of Monolith/Littelfuse planar SiC MOSFETs have been evaluated using constant voltage time-dependent dielectric breakdown for gate oxide wearout predictions, showing estimated > 100 year life at VGS=+25V and T=175C. Using extended time high-temperature gate bias, we have shown < 250 mV threshold voltage shifts for > 5000 hours under VGS=+25V and negligible threshold voltage shifts for > 2500 hours under VGS=-10V, both at T=175C. Under unclamped inductive switching, these 1200V, 80 mOhm SiC MOSFETs survive 1000 mJ of avalanche energy, meeting state-of-art ruggedness for 1200V SiC MOSFETs.

Gate-Prior-To-Isolation Cmos-Technology with Through-The-Gate-Implanted Ultra-Thin Gate Oxides

1999 ◽  
Vol 567 ◽  
Author(s):  
Udo Schwalke ◽  
Christian Gruensfelder ◽  
Alexander Gschwandtner ◽  
Gudrun Innertsberger ◽  
Martin Kerber
Keyword(s):  
Gate Oxide ◽  
Cmos Technology ◽  
Wafer Surface ◽  
Shallow Trench Isolation ◽  
Trench Isolation ◽  
Process Architecture ◽  
Process Complexity ◽  
Mos Gate ◽  
Cluster Tool

ABSTRACTWe have realized direct-tunneling gate oxide (1.6nm) NMOS and PMOS transistors by means of through-the-gate-implantation in a comer parasitics-free shallow-trench-isolation CMOS technology. In order to take full advantage of in-situ cluster-tool processing and to preserve initial wafer-surface quality, the essential part of the MOS gate is fabricated prior to device isolation and through-the-gate-implantation is utilized for well- and channel doping. In addition, a fully-reinforced-gate-oxide-perimeter is provided and trench comer parasitics are eliminated by the advanced process architecture EXTIGATE without increasing process complexity.

Effects of Pre-Gate Oxidation Cleaning and Gettering Upon The Very Thin Oxide Integrity

1986 ◽  
Vol 71 ◽  
Author(s):  
J. Lee ◽  
C. Y. Tung ◽  
S. Hahn ◽  
P. Chiao
Keyword(s):  
Carrier Lifetime ◽  
Minority Carrier ◽  
Minority Carrier Lifetime ◽  
Gate Oxide ◽  
The Other ◽  
Time Dependent ◽  
Cleaning Process ◽  
Oxygen Precipitation ◽  
Other Hand ◽  
Thin Gate Oxide

AbstractVarious pre-gate oxide cleaning and gettering techniques on the integrity of thin gate oxide were investigated. A 100 Å thick oxide capacitor was used to study its time-dependent breakdown characteristics and minority carrier lifetime. It has been shown that the oxide integrity as measured by time-dependent breakdown and the minority carrier lifetime are very sensitive to the cleaning technique. On the other hand, given adequate cleaning process, different intrinsic gettering schemes may only influence the oxygen precipitation, as well as the minority carrier lifetime, but not the oxide integrity.

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