Equivalent Faults under Launch-on-Shift (LOS) Tests with Equal Primary Input Vectors

2021 ◽  
Vol 26 (4) ◽  
pp. 1-15
Author(s):  
Irith Pomeranz
Keyword(s):  
Test Generation ◽  
Fault Simulation ◽  
Single Cycle ◽  
Primary Input ◽  
Test Set ◽  
Efficient Procedure ◽  
Test Compaction ◽  
Transition Faults ◽  
Transition Fault ◽  
Types Of Faults

A recent work showed that it is possible to transform a single-cycle test for stuck-at faults into a launch-on-shift (LOS) test that is guaranteed to detect the same stuck-at faults without any logic or fault simulation. The LOS test also detects transition faults. This was used for obtaining a compact LOS test set that detects both types of faults. In the scenario where LOS tests are used for both stuck-at and transition faults, this article observes that, under certain conditions, the detection of a stuck-at fault guarantees the detection of a corresponding transition fault. This implies that the two faults are equivalent under LOS tests. Equivalence can be used for reducing the set of target faults for test generation and test compaction. The article develops this notion of equivalence under LOS tests with equal primary input vectors and provides an efficient procedure for identifying it. It presents experimental results to demonstrate that such equivalences exist in benchmark circuits, and shows an unexpected effect on a test compaction procedure.

scholarly journals On-chip Generation of Functional Tests with Reduced Delay and Power

2017 ◽  
Vol 6 (1) ◽  
pp. 36-46
Author(s):  
Hemanth Kumar Motamarri ◽  
B. Leela Kumari
Keyword(s):  
Test Generation ◽  
Fault Coverage ◽  
Pattern Generation ◽  
Functional Tests ◽  
Primary Input ◽  
Transition Fault ◽  
High Transition ◽  
On Chip

This paper describes different methods  on-chip test generation method for functional tests. The hardware was based on application of primary input sequences in order to allow the circuit to produce reachable states. Random primary input sequences were modeled to avoid repeated synchronization and thus yields varied sets of reachable states by implementing a decoder in between circuit and LFSR. The on-chip generation of functional tests require simple hardware and achieved high transition fault coverage for testable circuits. Further, power and delay can be reduced by using Bit Swapping LFSR (BS-LFSR). This technique yields less number of transitions for all pattern generation. Bit-swapping (BS) technique is less complex and more reliable to hardware miscommunications.

Transition Fault Simulation

1987 ◽  
Vol 4 (2) ◽  
pp. 32-38 ◽  
Author(s):  
John Waicukauski ◽  
Eric Lindbloom ◽  
Barry Rosen ◽  
Vijay Iyengar
Keyword(s):  
Fault Simulation ◽  
Transition Fault

scholarly journals Modeling of Coal Mill System Used for Fault Simulation

Energies ◽  
2020 ◽  
Vol 13 (7) ◽  
pp. 1784
Author(s):  
Yong Hu ◽  
Boyu Ping ◽  
Deliang Zeng ◽  
Yuguang Niu ◽  
Yaokui Gao
Keyword(s):  
Relative Error ◽  
Power Plants ◽  
Fault Simulation ◽  
Recognition Rate ◽  
Model Parameters ◽  
Actual Object ◽  
Fault Recognition ◽  
Sample Data ◽  
Grinding Mechanism ◽  
Types Of Faults

Monitoring and diagnosis of coal mill systems are critical to the security operation of power plants. The traditional data-driven fault diagnosis methods often result in low fault recognition rate or even misjudgment due to the imbalance between fault data samples and normal data samples. In order to obtain massive fault sample data effectively, based on the analysis of primary air system, grinding mechanism and energy conversion process, a dynamic model of the coal mill system which can be used for fault simulation is established. Then, according to the mechanism of various faults, three types of faults (i.e., coal interruption, coal blockage and coal self-ignition) are simulated through the modification of model parameters. The simulation shows that the dynamic characteristic of the model is consistent with the actual object, the relative error of each output variable is less than 2.53%, and the total average relative error of all outputs is about 1.2%. The model has enough accuracy and adaptability for fault simulation, and the problem of massive fault samples acquisition can be effectively solved by the proposed method.

Fault simulation and test generation

2009 ◽  
pp. 851-917
Author(s):  
James C.-M. Li ◽  
Michael S. Hsiao
Keyword(s):  
Test Generation ◽  
Fault Simulation
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