Flexible low-power VLSI architecture for MPEG-4 motion estimation

Mapping Intimacies ◽

10.1117/12.334740 ◽

1998 ◽

Cited By ~ 2

Author(s):

Peter M. Kuhn ◽

Ulrich Niedermeier ◽

Liang-Fang Chao ◽

Walter Stechele

Keyword(s):

Motion Estimation ◽

Low Power ◽

Vlsi Architecture

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A Fast and Low-power VLSI Architecture for Half-pixel Motion Estimation Using Two-step Search Algorithm for HDTV Application

IETE Journal of Research ◽

10.4103/0377-2063.83648 ◽

2011 ◽

Vol 57 (3) ◽

pp. 263 ◽

Cited By ~ 1

Author(s):

SumitK Chatterjee ◽

Indrajit Indrajit

Keyword(s):

Motion Estimation ◽

Low Power ◽

Search Algorithm ◽

Vlsi Architecture

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Efficient sub-pixel interpolation and low power VLSI architecture for fractional motion estimation in H.264/AVC

2010 4th International Conference on Signal Processing and Communication Systems ◽

10.1109/icspcs.2010.5709764 ◽

2010 ◽

Cited By ~ 3

Author(s):

Obianuju Ndili ◽

Tokunbo Ogunfunmi

Keyword(s):

Motion Estimation ◽

Low Power ◽

Vlsi Architecture ◽

Pixel Interpolation ◽

Fractional Motion Estimation

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A low power VLSI architecture for multistage interval-based motion estimation (MIME) algorithm

Third International Workshop on Digital and Computational Video, 2002. DCV 2002. Proceedings. ◽

10.1109/dcv.2002.1218757 ◽

2004 ◽

Author(s):

H. Mahmoud ◽

S. Goel ◽

M. Shaaban ◽

T. Darwish ◽

M. Bayoumi

Keyword(s):

Motion Estimation ◽

Low Power ◽

Vlsi Architecture

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Low power 2-D array VLSI architecture for block matching motion estimation using computation suspension

2000 IEEE Workshop on SiGNAL PROCESSING SYSTEMS. SiPS 2000. Design and Implementation (Cat. No.00TH8528) ◽

10.1109/sips.2000.886704 ◽

2002 ◽

Author(s):

Kin-Hung Lam ◽

Chi-Ying Tsui

Keyword(s):

Motion Estimation ◽

Low Power ◽

Vlsi Architecture ◽

Block Matching

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Data-adaptive motion estimation algorithm and VLSI architecture design for low-power video systems

IEE Proceedings - Computers and Digital Techniques ◽

10.1049/ip-cdt:20030858 ◽

2004 ◽

Vol 151 (1) ◽

pp. 51 ◽

Cited By ~ 36

Author(s):

S. Saponara ◽

L. Fanucci

Keyword(s):

Motion Estimation ◽

Low Power ◽

Vlsi Architecture ◽

Estimation Algorithm ◽

Architecture Design ◽

Adaptive Motion ◽

Video Systems ◽

Motion Estimation Algorithm ◽

Data Adaptive

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A low-power VLSI architecture for full-search block-matching motion estimation

IEEE Transactions on Circuits and Systems for Video Technology ◽

10.1109/76.709406 ◽

1998 ◽

Vol 8 (4) ◽

pp. 393-398 ◽

Cited By ~ 86

Author(s):

V.L. Do ◽

K.Y. Yun

Keyword(s):

Motion Estimation ◽

Low Power ◽

Vlsi Architecture ◽

Block Matching ◽

Full Search

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VLSI architecture for low power motion estimation using high data access reuse

AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360) ◽

10.1109/apasic.1999.824053 ◽

2003 ◽

Author(s):

Bo-Sung Kim ◽

Jun-Dong Cho

Keyword(s):

Motion Estimation ◽

Low Power ◽

Vlsi Architecture ◽

Data Access ◽

High Data

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Low-Power Motion Estimation Processor with 3D Stacked Memory

IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences ◽

10.1587/transfun.e98.a.1431 ◽

2015 ◽

Vol E98.A (7) ◽

pp. 1431-1441 ◽

Cited By ~ 1

Author(s):

Shuping ZHANG ◽

Jinjia ZHOU ◽

Dajiang ZHOU ◽

Shinji KIMURA ◽

Satoshi GOTO

Keyword(s):

Motion Estimation ◽

Low Power ◽

Stacked Memory

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A Low-Power VLSI Architecture for HEVC De-Quantization and Inverse Transform

IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences ◽

10.1587/transfun.e99.a.2375 ◽

2016 ◽

Vol E99.A (12) ◽

pp. 2375-2387

Author(s):

Heming SUN ◽

Dajiang ZHOU ◽

Shuping ZHANG ◽

Shinji KIMURA

Keyword(s):

Low Power ◽

Vlsi Architecture ◽

Inverse Transform

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A VLSI architecture for video object motion estimation using a 2D hierarchical mesh model

Microprocessors and Microsystems ◽

10.1016/s0141-9331(02)00106-0 ◽

2003 ◽

Vol 27 (3) ◽

pp. 131-140 ◽

Cited By ~ 3

Author(s):

Wael Badawy

Keyword(s):

Motion Estimation ◽

Vlsi Architecture ◽

Object Motion ◽

Video Object ◽

Mesh Model

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