Benchmarking of EUV lithography line/space patterning versus immersion lithography multipatterning schemes at equivalent pitch

Patterning of 25 nm Contact Holes at 90 nm Pitch: Combination of Line/Space Double Exposure Immersion Lithography and Plasma-Assisted Shrink Technology

Japanese Journal of Applied Physics ◽

10.7567/jjap.50.08je07 ◽

2011 ◽

Vol 50 (8S1) ◽

pp. 08JE07 ◽

Cited By ~ 2

Author(s):

Jean-François de Marneffe ◽

Frédéric Lazzarino ◽

Danny Goossens ◽

Alain Vandervorst ◽

Olivier Richard ◽

...

Keyword(s):

Double Exposure ◽

Immersion Lithography ◽

Line Space

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Successors of ArF Water-Immersion Lithography: EUV Lithography, Multi-e-beam Maskless Lithography, or Nanoimprint?

Journal of Micro/Nanolithography MEMS and MOEMS ◽

10.1117/1.3062205 ◽

2008 ◽

Vol 7 (4) ◽

pp. 040101 ◽

Cited By ~ 4

Author(s):

Burn J. Lin

Keyword(s):

Water Immersion ◽

Maskless Lithography ◽

Immersion Lithography ◽

Euv Lithography

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Chemically amplified resists resolving 25 nm 1:1 line: space features with EUV lithography

10.1117/12.712981 ◽

2007 ◽

Cited By ~ 12

Author(s):

James W. Thackeray ◽

Roger A. Nassar ◽

Robert Brainard ◽

Dario Goldfarb ◽

Thomas Wallow ◽

...

Keyword(s):

Chemically Amplified ◽

Euv Lithography ◽

Chemically Amplified Resists ◽

Line Space

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Parameter Fluctuations in Multiple Patterned Deca-nm Scaled CMOS Structures

Journal of Nano Research ◽

10.4028/www.scientific.net/jnanor.17.157 ◽

2012 ◽

Vol 17 ◽

pp. 157-163 ◽

Cited By ~ 1

Author(s):

Klaus T. Kallis ◽

John T. Horstmann ◽

H.L. Fiedler

Keyword(s):

Statistical Analysis ◽

Threshold Voltage ◽

Channel Length ◽

Cmos Circuits ◽

Process Flow ◽

Industrial Manufacturing ◽

Immersion Lithography ◽

Euv Lithography ◽

193 Nm ◽

Active Channel

Multiple Patterning Seems to Be One of the Most Promising Solutions for the Gap between the 193 Nm Immersion Lithography and the 13.5 Nm EUV Lithography for Industrial Manufacturing of Ultra Large Scaled Integrated CMOS Circuits [1]. the Used Techniques in this Paper Lead to an Excellent Homogeneity and Uniformity of the Channel Length and Width which Enables a Fundamental Statistical Analysis of the Electrical Transistor Parameters. the Process Flow Has Been Optimized to Minimize the Active Channel Area and to Achieve a Sufficient Yield for a Trustworthy Statistical Analysis. while the Channel Length Is Defined by a Single Deposition- and Etchback Technique the Active Area Is Defined by a Composition of Multiple Spacers that Lead to a Diffusion Stop Barrier. the Statistical Analysis of these Devices Shows Dramatically Increasing Fluctuations of the Threshold Voltage if the Device Dimensions Are Decreased.

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CURRENT ISSUES AND FUTURE PROSPECTS OF LITHOGRAPHY

International Journal of High Speed Electronics and Systems ◽

10.1142/s0129156406003709 ◽

2006 ◽

Vol 16 (01) ◽

pp. 375-387 ◽

Cited By ~ 1

Author(s):

SHINJI OKAZAKI

Keyword(s):

Optical Lithography ◽

Small Scale ◽

Scale Production ◽

Resolution Limit ◽

Immersion Lithography ◽

Euv Lithography ◽

Liquid Immersion ◽

Low K ◽

Intensive Development ◽

Nano Imprint

The resolution limit of optical lithography now looms on the horizon. We are using very complicated masks and sophisticated exposure tools with very low k1 factors. To deal with this situation, liquid immersion lithography is now under intensive development. It can extend the application of the optical lithography for one or two generation, but the k1 factor remains very small. To obtain a significantly larger k1 value, we shall move to the non-optical lithography techniques. EUV lithography is the strongest candidate. Many problems of EUV still remain though we have remarkable achievements recently. In addition to the mass production technology, methods such as maskless lithography (ML2) and nano-imprint lithography were also developed for small-scale production and some other applications.

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