A self-test circuit for evaluating memory sense-amplifier signal

Author(s):  
R.D. Adams ◽  
E.S. Cooley ◽  
P.R. Hansen
2016 ◽  
Vol 10 (1) ◽  
pp. 1-10 ◽  
Author(s):  
Zhiting Lin ◽  
Chunyu Peng ◽  
Kun Wang

With increasingly stringent requirements for memory test, the complexity of the test algorithm is increasing. This will make BIST (Build-In-Self-Test) circuit more complex and the area of BIST circuit larger. This paper proposes a novel controllable BIST circuit. The controllable BIST circuit provides a cost-effective solution that supports a variety of March algorithms and SRAM embedded testing operation modes. It controls the test patterns with three additional input ports. And it indicates the algorithm progress, the test result and the number of fails with three output ports. To achieve test patterns generation, analy-sis and test results recording, the proposed BIST circuit contains five internal functional modules, which are Address Gener-ator, Control Generator, Data Generator, Data Comparator and Fail Accumulator. The test patterns of the proposed BIST cir-cuit are controlled by external signals. It is not only suitable for any existing march algorithms but also leaves room for ex-tension if needed.


2012 ◽  
Vol 214 ◽  
pp. 534-537
Author(s):  
Shu Fang Yu ◽  
Xiao Ping Shi ◽  
Xiu Liang Huang

The instrumentation is a complexity of the whole system composed by many circuit modules. In order to achieve the detection to the entire system, when the overall system design, the designer must design circuits with judge and test methods suitable for a variety of levels in the case of considering to enables various modules carry on the wrong judgment and state test. This will provide the capabilities of intelligent monitoring and detection for the normal operation of the whole system. This paper has briefly introduced the development trends of modern instrumentation, analyzed the classification level of the failure alarm, given the general intelligent failure alarm circuit and self-test circuit, and provided a theoretical basis and practical reference for the studying of intelligent design of the failure alarm in a variety of instrumentation.


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