A new inter-core built-in-self-test circuit for tri-state buffers in the system-on-a-chip

Proceedings 10th Asian Test Symposium ◽

10.1109/ats.2001.990332 ◽

2002 ◽

Cited By ~ 1

Author(s):

T. Kishi ◽

M. Ohta ◽

T. Taniguchi ◽

H. Kadota

Keyword(s):

Test Circuit ◽

Self Test ◽

System On A Chip ◽

Built In Self Test

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A built-in self-test circuit for measuring 1dB gain compression point of power amplifiers

2017 IEEE 4th International Conference on Knowledge-Based Engineering and Innovation (KBEI) ◽

10.1109/kbei.2017.8324924 ◽

2017 ◽

Cited By ~ 1

Author(s):

Saeedeh Makhsuci ◽

Mehdi Ehsanian

Keyword(s):

Power Amplifiers ◽

Gain Compression ◽

Test Circuit ◽

Self Test ◽

Built In Self Test

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Novel spectral methods for built-in self-test in a system-on-a-chip environment

Proceedings 19th IEEE VLSI Test Symposium. VTS 2001 ◽

10.1109/vts.2001.923434 ◽

2002 ◽

Cited By ~ 10

Author(s):

A. Giani ◽

Shuo Sheng ◽

M.S. Hsiao ◽

V.D. Agrawal

Keyword(s):

Spectral Methods ◽

Self Test ◽

System On A Chip ◽

Built In Self Test

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Logic Built-In Self-Test for Core-Based Designs on System-on-a-Chip

2008 IEEE Instrumentation and Measurement Technology Conference ◽

10.1109/imtc.2008.4547281 ◽

2008 ◽

Cited By ~ 2

Author(s):

Kiran George ◽

Chien-In Henry Chen

Keyword(s):

Self Test ◽

System On A Chip ◽

Built In Self Test

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A built-in self-test circuit for jitter tolerance measurement in high-speed wireline receivers

2014 International Test Conference ◽

10.1109/test.2014.7035305 ◽

2014 ◽

Cited By ~ 2

Author(s):

Myeong-Jae Park ◽

Jaeha Kim

Keyword(s):

High Speed ◽

Test Circuit ◽

Jitter Tolerance ◽

Self Test ◽

Built In Self Test

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Interactive built-in self-test compression for testing a system-on-a-chip

IEE Proceedings - Computers and Digital Techniques ◽

10.1049/ip-cdt:20030505 ◽

2003 ◽

Vol 150 (4) ◽

pp. 189 ◽

Cited By ~ 1

Author(s):

D. Kay ◽

S. Mourad

Keyword(s):

Test Compression ◽

Self Test ◽

System On A Chip ◽

Built In Self Test

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Design of generic embedded memory built in self test circuit

2009 9th International Conference on Electronic Measurement & Instruments ◽

10.1109/icemi.2009.5274617 ◽

2009 ◽

Cited By ~ 2

Author(s):

Qiao Liyan ◽

Bai Shi ◽

Zhao Xin ◽

Wang Ge

Keyword(s):

Embedded Memory ◽

Test Circuit ◽

Self Test ◽

Built In Self Test

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A built-in self-test circuit with timing margin test function in a 1 Gbit synchronous DRAM

Proceedings International Test Conference 1996. Test and Design Validity ◽

10.1109/test.1996.556977 ◽

2002 ◽

Cited By ~ 8

Author(s):

N. Sakashita ◽

F. Okuda ◽

K. Shimomura ◽

H. Shimano ◽

M. Hamada ◽

...

Keyword(s):

Test Function ◽

Test Circuit ◽

Self Test ◽

Built In Self Test

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A Code Width Built-In-Self Test Circuit for 8-bit Pipelined ADC

2011 21st International Conference on Systems Engineering ◽

10.1109/icseng.2011.58 ◽

2011 ◽

Cited By ~ 4

Author(s):

Alok Barua ◽

Md. Tausiff

Keyword(s):

Pipelined Adc ◽

Test Circuit ◽

Self Test ◽

Built In Self Test

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A Low Cost Built-In Self-Test Circuit for High-Speed Source Synchronous Memory Interfaces

2010 19th IEEE Asian Test Symposium ◽

10.1109/ats.2010.30 ◽

2010 ◽

Cited By ~ 2

Author(s):

Hyunjin Kim ◽

Jacob A. Abraham

Keyword(s):

High Speed ◽

Low Cost ◽

Test Circuit ◽

Self Test ◽

Built In Self Test

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A 10 Gsps 8 bit digital-to-analog converter with a built-in self-test circuit

Journal of Semiconductors ◽

10.1088/1674-4926/34/12/125007 ◽

2013 ◽

Vol 34 (12) ◽

pp. 125007

Author(s):

Lei Zhou ◽

Danyu Wu ◽

Fan Jiang ◽

Zhi Jin ◽

Xinyu Liu

Keyword(s):

Digital To Analog Converter ◽

Test Circuit ◽

Analog Converter ◽

Self Test ◽

Built In Self Test ◽

Digital To Analog

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