jitter tolerance
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Fast Jitter Tolerance Testing for High-Speed Serial Links in Post-Silicon Validation

2021 ◽  
pp. 1-8
Author(s):  
Andres Viveros-Wacher ◽  
Ricardo Baca-Baylon ◽  
Francisco E. Rangel-Patino ◽  
Johana L. Silva-Cortes ◽  
Edgar A. Vega-Ochoa ◽  
...  
Keyword(s):  
High Speed ◽  
Serial Links ◽  
Jitter Tolerance ◽  
Tolerance Testing

An Analytical Jitter Tolerance Model for DLL-Based Clock and Data Recovery Circuits

2020 ◽  
Vol 28 (11) ◽  
pp. 2257-2267
Author(s):  
Kyungho Ryu ◽  
Kil-Hoon Lee ◽  
Jung-Pil Lim ◽  
Jinho Kim ◽  
Hansu Pae ◽  
...  
Keyword(s):  
Clock And Data Recovery ◽  
Data Recovery ◽  
Jitter Tolerance ◽  
Tolerance Model

A 5–13.5 Gb/s Multistandard Receiver With High Jitter Tolerance Digital CDR in 40-nm CMOS Process

2020 ◽  
Vol 67 (10) ◽  
pp. 3378-3388
Author(s):  
Zhou Shu ◽  
Shalin Huang ◽  
Zhipeng Li ◽  
Peng Yin ◽  
Jiandong Zang ◽  
...  
Keyword(s):  
Cmos Process ◽  
Jitter Tolerance ◽  
Multistandard Receiver

A Holistic Formulation for System Margining and Jitter Tolerance Optimization in Industrial Post-Silicon Validation

2020 ◽  
Vol 8 (2) ◽  
pp. 453-463 ◽  
Author(s):  
Francisco Elias Rangel-Patino ◽  
Andres Viveros-Wacher ◽  
Jose Ernesto Rayas-Sanchez ◽  
Ismael Duron-Rosales ◽  
Edgar Andrei Vega-Ochoa ◽  
...  
Keyword(s):  
Tolerance Optimization ◽  
Jitter Tolerance

An Inductorless 20-Gb/s CDR With High Jitter Tolerance

2019 ◽  
Vol 54 (10) ◽  
pp. 2857-2866
Author(s):  
Long Kong ◽  
Yikun Chang ◽  
Behzad Razavi
Keyword(s):  
Jitter Tolerance
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