The Impact of an Ultrathin Y2O3Layer on GeO2Passivation in Ge MOS Gate Stacks

2017 ◽  
Vol 64 (8) ◽  
pp. 3303-3307 ◽  
Author(s):  
Yujin Seo ◽  
Tae In Lee ◽  
Chang Mo Yoon ◽  
Bo-Eun Park ◽  
Wan Sik Hwang ◽  
...  
Keyword(s):  
Gate Stacks ◽  
The Impact ◽  
Mos Gate

NEGATIVE BIAS TEMPERATURE INSTABILITY IN TIN/HF-SILICATE BASED GATE STACKS

2007 ◽  
Vol 17 (01) ◽  
pp. 129-141
Author(s):  
N. A. CHOWDHURY ◽  
D. MISRA ◽  
N. RAHIM
Keyword(s):  
Interface State ◽  
Initial Time ◽  
Negative Bias ◽  
Gate Stacks ◽  
Negative Bias Temperature Instability ◽  
Threshold Voltage Shift ◽  
Temperature Instability ◽  
Bias Temperature Instability ◽  
High Bias ◽  
The Impact

This work studies the effects of negative bias temperature instability (NBTI) on p-channel MOSFETS with TiN/HfSi x O y (20% SiO 2 based high-κ gate stacks under different gate bias and elevated temperature conditions. For low bias conditions, threshold voltage shift (ΔVT) is most probably due to the mixed degradation within the bulk high-κ. For moderately high bias conditions, H-species dissociation in the presence of holes and subsequent diffusion may be initially responsible for interface state and positively charged bulk trap generation. Initial time, temperature and oxide electric field dependence of ΔVT in our devices shows an excellent match with that of SiO 2 based devices, which is explained by reaction-diffusion (R-D) model of NBTI. Under high bias condition at elevated temperatures, due to higher Si - H bond-annealing/bond-breaking ratio, the experimentally observed absence of the impact ionization induced hot holes at the interfacial layer (IL)/ Si interface probably limits the interface state generation and ΔVT as they quickly reach saturation.

Charge trapping and degradation of HfO/sub 2//SiO/sub 2/ MOS gate stacks observed with enhanced CAFM

2006 ◽  
Vol 27 (3) ◽  
pp. 157-159 ◽  
Author(s):  
L. Aguilera ◽  
M. Porti ◽  
M. Nafria ◽  
X. Aymerich
Keyword(s):  
Charge Trapping ◽  
Gate Stacks ◽  
Mos Gate

A New Quality Metric for III–V/High-k MOS Gate Stacks Based on the Frequency Dispersion of Accumulation Capacitance and the CET

2017 ◽  
Vol 38 (3) ◽  
pp. 318-321 ◽  
Author(s):  
Abhitosh Vais ◽  
Jacopo Franco ◽  
Koen Martens ◽  
Dennis Lin ◽  
Sonja Sioncke ◽  
...  
Keyword(s):  
Frequency Dispersion ◽  
Gate Stacks ◽  
Quality Metric ◽  
High K ◽  
Mos Gate

Physical and electrical characterizations of AlGaN/GaN MOS gate stacks with AlGaN surface oxidation treatment

2018 ◽  
Vol 57 (6S3) ◽  
pp. 06KA07
Author(s):  
Takahiro Yamada ◽  
Kenta Watanabe ◽  
Mikito Nozaki ◽  
Hong-An Shih ◽  
Satoshi Nakazawa ◽  
...  
Keyword(s):  
Surface Oxidation ◽  
Gate Stacks ◽  
Oxidation Treatment ◽  
Electrical Characterizations ◽  
Mos Gate

Preliminary Study of the Breakdown Strength of TiN/HfO2/SiO2/Si MOS Gate Stacks

2006 ◽  
Author(s):  
Richard Southwick ◽  
Mark Elgin ◽  
Gennadi Bersuker ◽  
Rino Choi ◽  
William Knowlton
Keyword(s):  
Breakdown Strength ◽  
Gate Stacks ◽  
Preliminary Study ◽  
Mos Gate

Automatic statistical full quantum analysis of C-V and I-V characteristics for advanced MOS gate stacks

2007 ◽  
Vol 84 (9-10) ◽  
pp. 2408-2411 ◽  
Author(s):  
C. Leroux ◽  
F. Allain ◽  
A. Toffoli ◽  
G. Ghibaudo ◽  
G. Reimbold
Keyword(s):  
Gate Stacks ◽  
Quantum Analysis ◽  
Mos Gate ◽  
Full Quantum

scholarly journals Hf-based high-k dielectrics for p-Ge MOS gate stacks

2014 ◽  
Vol 32 (3) ◽  
pp. 03D105 ◽  
Author(s):  
Sivan Fadida ◽  
Felix Palumbo ◽  
Laura Nyns ◽  
Dennis Lin ◽  
Sven Van Elshocht ◽  
...  
Keyword(s):  
Gate Stacks ◽  
High K ◽  
Mos Gate
Sign in / Sign up

Export Citation Format

Share Document