Hf-based high-k dielectrics for p-Ge MOS gate stacks

Sivan Fadida; Felix Palumbo; Laura Nyns; Dennis Lin; Sven Van Elshocht; Matty Caymax; Moshe Eizenberg

doi:10.1116/1.4837295

Hf-based high-k dielectrics for p-Ge MOS gate stacks

Journal of Vacuum Science & Technology B Nanotechnology and Microelectronics Materials Processing Measurement and Phenomena ◽

10.1116/1.4837295 ◽

2014 ◽

Vol 32 (3) ◽

pp. 03D105 ◽

Cited By ~ 13

Author(s):

Sivan Fadida ◽

Felix Palumbo ◽

Laura Nyns ◽

Dennis Lin ◽

Sven Van Elshocht ◽

...

Keyword(s):

Gate Stacks ◽

High K ◽

Mos Gate

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A New Quality Metric for III–V/High-k MOS Gate Stacks Based on the Frequency Dispersion of Accumulation Capacitance and the CET

IEEE Electron Device Letters ◽

10.1109/led.2017.2657794 ◽

2017 ◽

Vol 38 (3) ◽

pp. 318-321 ◽

Cited By ~ 10

Author(s):

Abhitosh Vais ◽

Jacopo Franco ◽

Koen Martens ◽

Dennis Lin ◽

Sonja Sioncke ◽

...

Keyword(s):

Frequency Dispersion ◽

Gate Stacks ◽

Quality Metric ◽

High K ◽

Mos Gate

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Low-frequency and radio-frequency C-V characterization of epitaxially grown InAs/high-k vertical nanowire MOS gate stacks

2016 Compound Semiconductor Week (CSW) [Includes 28th International Conference on Indium Phosphide & Related Materials (IPRM) & 43rd International Symposium on Compound Semiconductors (ISCS) ◽

10.1109/iciprm.2016.7528570 ◽

2016 ◽

Author(s):

Jun Wu ◽

Kristofer Jansson ◽

Aein Shiri Banadi ◽

Erik Lind ◽

Lars-Erik Wernersson

Keyword(s):

Radio Frequency ◽

Low Frequency ◽

Gate Stacks ◽

High K ◽

Mos Gate

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Preparation of Native Oxide and Carbon-Minimized Ge Surface by NH[sub 4]OH-Based Cleaning for High-k∕Ge MOS Gate Stacks

Journal of The Electrochemical Society ◽

10.1149/1.3212848 ◽

2009 ◽

Vol 156 (11) ◽

pp. H813 ◽

Cited By ~ 14

Author(s):

H. Seo ◽

K. B. Chung ◽

J. P. Long ◽

G. Lucovsky

Keyword(s):

Native Oxide ◽

Gate Stacks ◽

High K ◽

Mos Gate

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Defect Creation Stimulated by Thermally Activated Hole Trapping as the Driving Force Behind Negative Bias Temperature Instability in SiO2, SiON, and High-k Gate Stacks

2008 IEEE International Integrated Reliability Workshop Final Report ◽

10.1109/irws.2008.4796094 ◽

2008 ◽

Cited By ~ 7

Author(s):

Tibor Grasser ◽

Ben Kaczer ◽

Thomas Aichinger ◽

Wolfgang Goes ◽

Michael Nelhiebel

Keyword(s):

Driving Force ◽

Negative Bias ◽

Gate Stacks ◽

Negative Bias Temperature Instability ◽

Temperature Instability ◽

Thermally Activated ◽

Bias Temperature Instability ◽

Hole Trapping ◽

High K ◽

Defect Creation

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Tradeoff Between Hot Carrier and Negative Bias Temperature Degradations in High-Performance $\hbox{Si}_{1 - x}\hbox{Ge}_{x}$ pMOSFETs With High-$k$/Metal Gate Stacks

IEEE Electron Device Letters ◽

10.1109/led.2010.2071851 ◽

2010 ◽

Author(s):

Won-Ho Choi ◽

Chang-Young Kang ◽

Jung-Woo Oh ◽

Byoung-Hun Lee ◽

Prashant Majhi ◽

...

Keyword(s):

High Performance ◽

Negative Bias ◽

Gate Stacks ◽

Metal Gate ◽

Hot Carrier ◽

High K

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Comparison of semiclassical transport formulations including quantum corrections for advanced devices with High-K gate stacks

2010 14th International Workshop on Computational Electronics ◽

10.1109/iwce.2010.5677952 ◽

2010 ◽

Author(s):

F. M. Bufler ◽

V. Aubry-Fortuna ◽

A. Bournel ◽

M. Braccioli ◽

P. Dollfus ◽

...

Keyword(s):

Quantum Corrections ◽

Gate Stacks ◽

High K ◽

Semiclassical Transport

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The Role of the Interfaces in the 1/f Noise of MOSFETs with High-k Gate Stacks

ECS Transactions ◽

10.1149/1.3122087 ◽

2019 ◽

Vol 19 (2) ◽

pp. 87-99 ◽

Cited By ~ 5

Author(s):

Felice Crupi ◽

Paolo Magnone ◽

Eddy Simoen ◽

Luigi Pantisano ◽

Gino Giusi ◽

...

Keyword(s):

Gate Stacks ◽

High K

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High-k Gate Stacks Influence on Characteristics of Nano-scale MOSFET Structures

Proceedings of the 2nd International Conference on Modelling, Identification and Control ◽

10.2991/mic-15.2015.39 ◽

2015 ◽

Cited By ~ 2

Author(s):

Konstantin O. Petrosyants ◽

Dmitriy A. Popov

Keyword(s):

Gate Stacks ◽

Nano Scale ◽

High K

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Effect of La$_{2}$O$_{3}$ Capping Layer Thickness on Hot-Carrier Degradation of n-Channel Metal–Oxide–Semiconductor Field-Effect Transistors with High-$k$/Metal Gate Stacks

Japanese Journal of Applied Physics ◽

10.1143/jjap.51.02bc10 ◽

2012 ◽

Vol 51 (2) ◽

pp. 02BC10

Author(s):

Dongwoo Kim ◽

Seonhaeng Lee ◽

Cheolgyu Kim ◽

Taekyung Oh ◽

Bongkoo Kang

Keyword(s):

Metal Oxide ◽

Layer Thickness ◽

Field Effect ◽

Field Effect Transistors ◽

Metal Oxide Semiconductor ◽

Oxide Semiconductor ◽

Gate Stacks ◽

Metal Gate ◽

Hot Carrier ◽

High K

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Counter Dipole Layer Formation in Multilayer High-$k$ Gate Stacks

Japanese Journal of Applied Physics ◽

10.1143/jjap.51.081303 ◽

2012 ◽

Vol 51 ◽

pp. 081303 ◽

Cited By ~ 5

Author(s):

Shinya Hibino ◽

Tomonori Nishimura ◽

Kosuke Nagashio ◽

Koji Kita ◽

Akira Toriumi

Keyword(s):

Layer Formation ◽

Gate Stacks ◽

Dipole Layer ◽

High K

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