The Impact of Gate-Oxide Breakdown on Common-Source Amplifiers With Diode-Connected Active Load in Low-Voltage CMOS Processes

2007 ◽  
Vol 54 (11) ◽  
pp. 2860-2870 ◽  
Author(s):  
Jung-Sheng Chen ◽  
Ming-Dou Ker
2002 ◽  
Vol 23 (9) ◽  
pp. 559-561 ◽  
Author(s):  
R. Rodriguez ◽  
J.H. Stathis ◽  
B.P. Linder ◽  
S. Kowalczyk ◽  
C.T. Chuang ◽  
...  

1996 ◽  
Vol 428 ◽  
Author(s):  
F. Lin ◽  
S. A. Ajuria ◽  
V. Ilderem ◽  
M. P. Masquelier

AbstractIn this paper, the impact of several front-end processing steps (up to gate oxidation) on gate oxide integrity (GOI) is evaluated. In PBL isolation processing, the use of as-deposited amorphous silicon (a-Si), subsequently annealed during nitride deposition, results in better structural and electrical properties compared to as-deposited polysilicon or as-deposited a-Si with an extra anneal step prior to nitride deposition. Thicker or dual sacrificial schemes exhibit improved gate oxide low voltage breakdown and charge-to-breakdown. Dilute RCA chemistries during pre-gate cleaning produce equal or better surfaces for gate oxidation than the conventional non-dilute RCA with less chemical usage. As gate oxides are scaled below 100Å, lowering gate oxidation temperature is proven to result in far better gate oxide quality than maintaining process temperatures at or above 900°C and diluting oxygen in either argon or nitrogen.


Author(s):  
K.A. Mohammad ◽  
L.J. Liu ◽  
S.F. Liew ◽  
S.F. Chong ◽  
D.G. Lee ◽  
...  

Abstract The paper focuses on the pad contamination defect removal technique. The defect is detected at the outgoing inspection step. The failure analysis results showed that the defect is Fluorine type contamination. The failure analysis indicated many source contributors mainly from Fluorine based processes. The focus is in the present work is in the rework method for the removal of this defect. The combination of wet and dry etch processing in the rework routine is utilized for the removal of the defect and preventive action plans for in-line were introduced and implemented to avoid this event in the future. The reliability of the wafer is verified using various tests including full map electrical, electrical sort, gate oxide breakdown (GOI) and wafer reliability level, passivation quick kill to ensure the integrity of the wafer after undergoing the rework routine. The wafer is monitored closely over a period of time to ensure it has no mushroom defect.


Author(s):  
Nobuyuki Wakai ◽  
Yuji Kobira ◽  
Hidemitsu Egawa ◽  
Masayoshi Tsutsumi

Abstract Fundamental consideration for CDM (Charged Device Model) breakdown was investigated with 90nm technology products and others. According to the result of failure analysis, it was found that gate oxide breakdown was critical failure mode for CDM test. High speed triggered protection device such as ggNMOS and SCR (Thyristor) is effective method to improve its CDM breakdown voltage and an improvement for evaluated products were confirmed. Technological progress which is consisted of down-scaling of protection device size and huge number of IC pins of high function package makes technology vulnerable and causes significant CDM stress. Therefore, it is expected that CDM protection designing tends to become quite difficult. In order to solve these problems in the product, fundamental evaluations were performed. Those are a measurement of discharge parameter and stress time dependence of CDM breakdown voltage. Peak intensity and rise time of discharge current as critical parameters are well correlated their package capacitance. Increasing stress time causes breakdown voltage decreasing. This mechanism is similar to that of TDDB for gate oxide breakdown. Results from experiences and considerations for future CDM reliable designing are explained in this report.


2021 ◽  
Vol 13 (13) ◽  
pp. 7279
Author(s):  
Zbigniew Skibko ◽  
Magdalena Tymińska ◽  
Wacław Romaniuk ◽  
Andrzej Borusiewicz

Wind power plants are an increasingly common source of electricity located in rural areas. As a result of the high variability of wind power, and thus the generated power, these sources should be classified as unstable sources. In this paper, the authors attempted to determine the impact of wind turbine operation on the parameters of electricity supplied to farms located near the source. As a result of the conducted field tests, variability courses of the basic parameters describing the supply voltage were obtained. The influence of power plant variability on the values of voltage, frequency, and voltage distortion factor was determined. To estimate the capacity of the transmission lines, the reactive power produced in the power plant and its effect on the value of the power factor were determined. The conducted research and analysis showed that the wind power plant significantly influences voltage fluctuations in its immediate vicinity (the maximum value registered was close to 2%, while the value required by law was 2.5%). Although all the recorded values are within limits specified by the current regulations (e.g., the THD value is four times lower than the required value), wind turbines may cause incorrect operation of loads connected nearby. This applies mainly to cases where consumers sensitive to voltage fluctuations are installed in the direct vicinity of the power plant.


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