Device Design for Subthreshold Slope and Threshold Voltage Control in Sub-100-nm Fully Depleted SOI MOSFETs

2004 ◽  
Vol 51 (12) ◽  
pp. 2161-2167 ◽  
Author(s):  
T. Numata ◽  
S.-I. Takagi
2018 ◽  
Vol 13 (3) ◽  
pp. 1-8
Author(s):  
Camila Alves ◽  
Denis Flandre ◽  
Michelly De Souza

This paper presents an evaluation of mismatching impact on the analog characteristics of fully-depleted graded-channel (GC) SOI MOSFET. This study is carried out by means of electrical measurements and two-dimensional numerical simulations, comparing GC to uniformly doped transistors. Important basic parameters such as threshold voltage and subthreshold slope were analyzed as well as analog parameters, namely transconductance, output conductance, Early voltage and intrinsic voltage gain.


2016 ◽  
Vol 3 (24) ◽  
pp. 1600713 ◽  
Author(s):  
Ji Hoon Park ◽  
Fwzah H. Alshammari ◽  
Zhenwei Wang ◽  
Husam N. Alshareef

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