2000 IEEE International SOI Conference. Proceedings (Cat. No.00CH37125)
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Impact of floating body and BS-tied architectures on SOI MOSFET's radio-frequency performances

2000 IEEE International SOI Conference. Proceedings (Cat. No.00CH37125) ◽

10.1109/soi.2000.892801 ◽

2002 ◽

Cited By ~ 8

Author(s):

O. Rozeau ◽

J. Jomaah ◽

J. Boussey ◽

C. Raynaud ◽

J.L. Pelloie ◽

...

Keyword(s):

Radio Frequency ◽

Floating Body

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Back gate engineering for suppression of threshold voltage fluctuation in fully-depleted SOI MOSFETs

2000 IEEE International SOI Conference. Proceedings (Cat. No.00CH37125) ◽

10.1109/soi.2000.892778 ◽

2002 ◽

Author(s):

T. Numata ◽

M. Noguchi ◽

Y. Oowaki ◽

S. Takagi

Keyword(s):

Threshold Voltage ◽

Voltage Fluctuation ◽

Back Gate ◽

Fully Depleted ◽

Gate Engineering

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Architecture of SOI transistors: what's next?

2000 IEEE International SOI Conference. Proceedings (Cat. No.00CH37125) ◽

10.1109/soi.2000.892741 ◽

2002 ◽

Cited By ~ 3

Author(s):

S. Cristoloveanu

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Co salicide technology for sub-0.15 μm FD-SOI and beyond: super-flat silicide and fully-silicided source/drain structure

2000 IEEE International SOI Conference. Proceedings (Cat. No.00CH37125) ◽

10.1109/soi.2000.892775 ◽

2002 ◽

Cited By ~ 2

Author(s):

T. Ichimori ◽

N. Hirashita

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Comparative low frequency noise analysis in various SOI devices: floating body, body-tied, DTMOS with and without current limiter

2000 IEEE International SOI Conference. Proceedings (Cat. No.00CH37125) ◽

10.1109/soi.2000.892802 ◽

2002 ◽

Cited By ~ 4

Author(s):

S. Haendler ◽

J. Jomaah ◽

F. Balestra ◽

J.L. Pelloie

Keyword(s):

Noise Analysis ◽

Low Frequency ◽

Floating Body ◽

Frequency Noise ◽

Low Frequency Noise ◽

Current Limiter ◽

Soi Devices

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Surface finishing of cleaved SOI films using epi technologies

2000 IEEE International SOI Conference. Proceedings (Cat. No.00CH37125) ◽

10.1109/soi.2000.892745 ◽

2002 ◽

Cited By ~ 3

Author(s):

A. Thilderkvist ◽

S. Kang ◽

M. Fuerfanger ◽

I.J. Malik

Keyword(s):

Surface Finishing

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Comparative analysis of PD-SOI active body-biasing circuits

2000 IEEE International SOI Conference. Proceedings (Cat. No.00CH37125) ◽

10.1109/soi.2000.892786 ◽

2002 ◽

Cited By ~ 5

Author(s):

M.R. Casu ◽

G. Masera ◽

G. Piccinini ◽

M. Ruo Roch ◽

M. Zamboni

Keyword(s):

Comparative Analysis ◽

Body Biasing

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New planar self-aligned double-gate fully-depleted P-MOSFETs using epitaxial lateral overgrowth (ELO) and selectively grown source/drain (S/D)

2000 IEEE International SOI Conference. Proceedings (Cat. No.00CH37125) ◽

10.1109/soi.2000.892794 ◽

2002 ◽

Cited By ~ 6

Author(s):

Taichi Su ◽

J.P. Denton ◽

G.W. Neudeck

Keyword(s):

Epitaxial Lateral Overgrowth ◽

Double Gate ◽

Fully Depleted ◽

Lateral Overgrowth

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RF systems based on silicon-on-sapphire technology

2000 IEEE International SOI Conference. Proceedings (Cat. No.00CH37125) ◽

10.1109/soi.2000.892755 ◽

2002 ◽

Author(s):

I. Lagnado ◽

P.R. De la Houssaye ◽

W.B. Dubbelday ◽

S.J. Koester ◽

R. Hammond ◽

...

Keyword(s):

Rf Systems

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Scalability potential in ELTRAN/sup (R)/ SOI-epi wafer

2000 IEEE International SOI Conference. Proceedings (Cat. No.00CH37125) ◽

10.1109/soi.2000.892744 ◽

2002 ◽

Cited By ~ 4

Author(s):

M. Ito ◽

K. Yamagata ◽

H. Miyabayashi ◽

T. Yonehara

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2000 IEEE International SOI Conference. Proceedings (Cat. No.00CH37125)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Impact of floating body and BS-tied architectures on SOI MOSFET's radio-frequency performances

Back gate engineering for suppression of threshold voltage fluctuation in fully-depleted SOI MOSFETs

Architecture of SOI transistors: what's next?

Co salicide technology for sub-0.15 μm FD-SOI and beyond: super-flat silicide and fully-silicided source/drain structure

Comparative low frequency noise analysis in various SOI devices: floating body, body-tied, DTMOS with and without current limiter

Surface finishing of cleaved SOI films using epi technologies

Comparative analysis of PD-SOI active body-biasing circuits

New planar self-aligned double-gate fully-depleted P-MOSFETs using epitaxial lateral overgrowth (ELO) and selectively grown source/drain (S/D)

RF systems based on silicon-on-sapphire technology

Scalability potential in ELTRAN/sup (R)/ SOI-epi wafer

2000 IEEE International SOI Conference. Proceedings (Cat. No.00CH37125)
Latest Publications