Degradation Mechanism of Short Channel p- FinFETs under Hot Carrier Stress and Constant Voltage Stress

Author(s):  
Hao Chang ◽  
Longda Zhou ◽  
Hong Yang ◽  
Zhigang Ji ◽  
Qianqian Liu ◽  
...  
2018 ◽  
Vol 2018 ◽  
pp. 1-6
Author(s):  
Jingyu Shen ◽  
Can Tan ◽  
Rui Jiang ◽  
Wei Li ◽  
Xue Fan ◽  
...  

The breakdown characteristics of ultra-thin gate oxide MOS capacitors fabricated in 65 nm CMOS technology under constant voltage stress and substrate hot-carrier injection are investigated. Compared to normal thick gate oxide, the degradation mechanism of time-dependent dielectric breakdown (TDDB) of ultra-thin gate oxide is found to be different. It is found that the gate current (Ig) of ultra-thin gate oxide MOS capacitor is more likely to be induced not only by Fowler-Nordheim (F-N) tunneling electrons, but also by electrons surmounting barrier and penetrating electrons in the condition of constant voltage stress. Moreover it is shown that the time to breakdown (tbd) under substrate hot-carrier injection is far less than that under constant voltage stress when the failure criterion is defined as a hard breakdown according to the experimental results. The TDDB mechanism of ultra-thin gate oxide will be detailed. The differences in TDDB characteristics of MOS capacitors induced by constant voltage stress and substrate hot-carrier injection will be also discussed.


2015 ◽  
Vol 15 (2) ◽  
pp. 236-241 ◽  
Author(s):  
Lili Ding ◽  
Elena Gnani ◽  
Simone Gerardin ◽  
Marta Bagatin ◽  
Francesco Driussi ◽  
...  

2017 ◽  
Vol 74 ◽  
pp. 74-80 ◽  
Author(s):  
Lihua Dai ◽  
Xiaonian Liu ◽  
Mengying Zhang ◽  
Leqing Zhang ◽  
Zhiyuan Hu ◽  
...  

2004 ◽  
Vol 808 ◽  
Author(s):  
Jae-Hoon Lee ◽  
Moon-Young Shin ◽  
Heesun Shin ◽  
Woo-Jin Nam ◽  
Min-Koo Han

ABSTRACTWe propose a short channel gate overlapped lightly doped drain (GOLDD) poly-Si TFT employing 45° tilt implant for source and drain (S/D) regions without any additional ion doping or mask. Oblique-incident ELA activation is performed to activate both n+ S/D and n- LDD regions as well as cure junction defects. The proposed poly-Si TFT can suppress the anomalous leakage current, and exhibit the better reliability against the hot-carrier stress.


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