Board level solder joint reliability modeling of Embedded Wafer Level BGA (eWLB) packages under temperature cycling test conditions

Author(s):  
Seng Guan Chow ◽  
Won Kyoung Choi ◽  
Roger Emigh ◽  
Eric Ouyang
1989 ◽  
Vol 111 (4) ◽  
pp. 310-312 ◽  
Author(s):  
E. Suhir

We discuss how temperature cycling test conditions could be modified to be used for a tentative evaluation of the fatigue life of solder joint interconnections in surface mounted devices subjected to power cycling.


2008 ◽  
Vol 48 (4) ◽  
pp. 602-610 ◽  
Author(s):  
Xiaowu Zhang ◽  
Vaidyanathan Kripesh ◽  
T.C. Chai ◽  
Teck Chun Tan ◽  
D. Pinjala

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