Wafer level LED packaging with optimal light output and thermal dissipation for high-brightness lighting

2014 ◽  
Author(s):  
Liang Wang ◽  
Gabe Guevara ◽  
Hala Shaba ◽  
Roseann Alatorre ◽  
Rey Co ◽  
...  
Keyword(s):  
Light Output ◽  
Thermal Dissipation ◽  
Wafer Level ◽  
High Brightness

High-brightness LEDs of big chip size on multi-layer interconnects with optimized thermal dissipation and optical performance

2014 ◽  
Vol 2014 (1) ◽  
pp. 000877-000881
Author(s):  
Liang Wang ◽  
Gabe Guevara ◽  
Grant Villavicencio ◽  
Roseann Alatorre ◽  
Hala Shaba ◽  
...  
Keyword(s):  
Flip Chip ◽  
Wavelength Conversion ◽  
Light Output ◽  
Light Extraction ◽  
Thermal Dissipation ◽  
High Yield ◽  
Wafer Level ◽  
High Brightness ◽  
Aperture Ratio ◽  
Chip Size

The market share of high-brightness LEDs in general lighting has been rapidly expanding mainly owing to the continued technological advances on internal quantum efficiency, light extraction and wavelength conversion. In spite of these promising advances, there remain some key breakthroughs to be made before LED lighting technology can be fully adopted into the broad market, with emphasis on efficient thermal dissipation, higher efficacy at high brightness, and low manufacturing cost. Higher brightness requires LEDs to be operated at higher current density which results in efficacy degradation due to droop behavior and thus higher power loss into heat and shorter lifetime. Therefore a highly efficient mechanism of thermal dissipation is needed for timely conduction of heat away from the high-power LED chip. For general lighting at high brightness, a large chip size is preferable. More importantly, with larger chip size, higher brightness can be achieved at much lower current density which leads to less degradation of efficacy. However simply increasing the die size of LEDs in wafer fabrication causes significant yield loss and thus hinders the adoption of big-chip LEDs. In this paper we propose a scalable approach to enable larger chip sizes for manufacturing high efficacy & high brightness LEDs at high yield and low cost. The metric of lower cost per lumen is necessary for LEDs to be competitive to traditional light sources like fluorescent lights in the consumer market segment. About 50% of the total LED production cost is consumed by the packaging processes after the emissive device stack being fabricated. Also given the minimal thickness of the device stack, the key bottleneck for thermal dissipation resides in the packaging structure and its interface to the device stack. We address these two key challenges with a novel wafer-level packaging structure of metal contacts forming a perimeter that is integrated into the device stack, which optimizes the thermal dissipation rate from the active device stack to substrate while allowing high aperture ratio and improved light output. Our approach applies a wafer-level batch process starting from LED fabrication to packaging for internal and external light extraction as well as wavelength conversion, in order to achieve high throughput and high yield in a scalable and inexpensive manner. To improve the overall power efficiency, different materials have been selected for ohmic contacts and high reflectivity at p and n electrodes, and further developments continue to be implemented, including a current-spreading layer, large-area light extraction structure and integrated phosphor material. Flip chip packaging is chosen due to its advantage of full front-side emission, maximized aperture ratio, compact form factor, higher integration density and ease of wafer level processing. The substrates for flip chip packaging of LED chips are made of Si which was selected due to its relatively high thermal conductivity (149 W/m/K) and ease of fabrication with standard semiconductor processes. Multi-layer interconnects are patterned over the Si substrate with solder bumps built over the passivation openings for flip-chip assembly of multiple LED dies. The multi-layer dielectric stack of the substrate is designed to form dielectric mirror maximizing the reflection of emitted light back into the LED side for improved light output.

Solutions for Wafer-Level Packaging of High Brightness LEDs

2011 ◽  
Vol 2011 (DPC) ◽  
pp. 001418-001442
Author(s):  
Thomas Uhrmann ◽  
B. Kim ◽  
T. Matthias ◽  
P. Lindner
Keyword(s):  
Form Factor ◽  
Light Output ◽  
High Volume ◽  
Performance Ratio ◽  
High Yield ◽  
Light Sources ◽  
Wafer Level ◽  
Process Step ◽  
High Brightness ◽  
The Cost

High brightness LEDs (HB-LEDs) carry a high prospect for general lighting applications. Competing with the cost/performance ratio of current light sources demands an increase of the overall efficiency as well as the reduction of the device cost. Since packaging accounts for 30%–50% of the cost of HB LED manufacturing, moving from die- level to wafer-level processes is one likely potential solution for reducing cost per lumen. Silicon-based WLP, using the established processing technology of the MEMS and IC industry, offers high fabrication reliability, high yield and the direct integration of the driver IC in the package. The already small form factor of WLP can be further reduced using Through-Silicon-Vias (TSV), increasing the maximum amount of chips per wafer. Silicon WLP also offers superior thermal management, with the relatively high thermal conductance of silicon. Redistributing LED dies on silicon wafer submounts, with metal bonding and copper TSVs, further improves the heat conductance away from the active region of the chip, resulting in increased device performance. Wafer-level optics can further improve performance and reduce packaging costs. Wafer-level lens molding based on imprint lithography is in high volume manufacture for cell phone camera modules. It allows creation of spherical and a-spherical lenses as well as lens stacks with minimized form factor. In contrast to the currently applied drop dispensing technique for LED lens fabrication, the shape of the lens can be accurately tailored and the decrease of the lens size results in lower absorption and higher light output. Most of these technologies are already in high volume production in other sectors. We will discuss the field proven solutions at each process step, from the formation of the silicon interposer, through the chip-to-wafer bonding, to the final imprinting of the wafer-level optics.

Wafer level packaging for high-brightness LED lighting with optimized thermal dissipation and optical performance

2014 ◽  
Vol 2014 (DPC) ◽  
pp. 001787-001817
Author(s):  
Liang Wang ◽  
Gabe Guevara ◽  
Rey Co ◽  
Ron Zhang ◽  
Roseann Alatorre
Keyword(s):  
Power Efficiency ◽  
Wavelength Conversion ◽  
Bonding Process ◽  
Light Extraction ◽  
Thermal Dissipation ◽  
Wafer Level ◽  
High Brightness ◽  
Led Lighting ◽  
Wafer Level Packaging ◽  
Packaging Structure

High-brightness LED lighting has gained high attention in the industry and its market share for general lighting has been rapidly expanding upon the continued progress on improving internal quantum efficiency, light extraction and wavelength conversion. In spite of these promising advances, some key breakthroughs must be made before this technology can be fully adopted into the broad market, such as efficient thermal dissipation and low manufacturing cost. A lion share of cost of an LED module is incurred during the packaging processes after the emissive device stack has been fabricated. Also given the thin thickness of device stack, the packaging structure remains the bottleneck for thermal dissipation. We address these two key challenges with a novel wafer-level packaging structure integrated into the device stack, which enables maximal thermal dissipation rate from active device stack to substrate while allowing high aperture ratio and optimized light output. Our approach applies full wafer-level batch process from epitaxial growth all the way down to packaging for internal and external light extraction as well as wavelength conversion, in order to achieve high throughput and high yield in a scalable and inexpensive manner. Initial prototypes of GaN based blue LED with big chip size have been fabricated without selective electrodes for minimal contact resistance, exhibiting high brightness at relatively low drive voltage (3.5V). As one key step in wafer level packaging, the wafer bonding process was characterized with Moire patterning and Topography and Deformation Measurement to understand the warpage profile and varying temperatures along both heat up and cool down paths, with simulation performed in guidance to final solution for compensating the warpage profile along the bonding process and afterwards. Different approaches were applied in learning the most effective bonding technique for this packaging structure. Further development is ongoing to improve the overall power efficiency and color quality, including optimal materials for ohmic contacts at both electrodes, current-spreading layer, large-area light extraction structure, and integrated phosphor material. This wafer-level packaging technology is scalable to large wafer size for high-throughput and low-cost manufacturing, to achieve both superior thermal management and optimized power efficiency.

Packaging of High Brightness, Big-Chip LEDs

2011 ◽  
Vol 2011 (DPC) ◽  
pp. 001472-001492
Author(s):  
Lidia Lee ◽  
Paul Panaccione
Keyword(s):  
Form Factor ◽  
System Design ◽  
Light Output ◽  
Large Area ◽  
Plug And Play ◽  
High Brightness ◽  
Package Design ◽  
System Requirements ◽  
Lighting Systems ◽  
The Impact

A common approach for designing HB-LEDs into a variety of lighting systems is to arrange an array of many emitters over a large area in order to provide the required photometric flux. In certain applications, this common approach of arraying a large number of small chip LEDs introduces a number of challenges that can be solved by using a single package of big-chip LEDs with enough light output to meet the system requirements. This presentation will discuss package design for big-chip LEDs, compared to an array of many small emitter packages. In addition to big-chip package design, the impact on system design including optics, drivers, thermals, reliability, and form factor will be addressed. For illustration, a reference example will be presented in detail, consisting of an easy to use plug and play single package with 36mm2 of emitting area capable of up to 6000 lumens.

Liquid Phase Homoepitaxial Growth of 4H-SiC Crystals and Fabrication Techniques of Bluish-Purple Light-Emitting Diodes

1989 ◽  
Vol 162 ◽  
Author(s):  
Y. Ueda ◽  
T. Nakata ◽  
K. Koga ◽  
Y. Matsushita ◽  
Y. Fujikawa ◽  
...  
Keyword(s):  
Liquid Phase ◽  
Light Output ◽  
Argon Atmosphere ◽  
Color Purity ◽  
Peak Wavelength ◽  
Vacuum Sublimation ◽  
High Brightness ◽  
Light Emitting ◽  
Homoepitaxial Growth ◽  
Forward Current

ABSTRACT4H-SiC single crystals have been fabricated on the seeds of 6H-type crystals by the vacuum-sublimation (modified Lely) method at a temperature of 2400 °C and under a pressure of 2–60 mbar in an argon atmosphere. Liquid phase epitaxy was attempted by using a dipping method with a 4H-SiC off-orientation substrate whose {0001} C-face varied toward the <1120> direction by 5 degrees. The polytype of the grown crystals was found to be the 4H-type through measurements of Raman scattering and photoluminescence. P-n junction diodes were epitaxially obtained on 4H-SiC substrates. Aluminum and nitrogen were doped as acceptors and donors, respectively. The LED emitted bluish-purple light with a high brightness of 2.2 mcd at a forward current of 20 mA. Other characteristics were as follows : 420–425 nm peak wavelength, 90 % color purity, and a light output of 4 μW.

A Multi-Colour Lamp Indicator

1972 ◽  
Vol 5 (3) ◽  
pp. 113-115
Author(s):  
E F Hasler
Keyword(s):  
Long Range ◽  
Information Transfer ◽  
Light Emitting Diodes ◽  
Light Output ◽  
Colour Change ◽  
Thermal Dissipation ◽  
Wide Angle ◽  
Light Emitting ◽  
Filament Lamps

Designs are presented of miniature indicators using either filament lamps or light emitting diodes of different colours showing at a common viewing window. Emphasis is placed on low thermal dissipation, efficiency of light output, long-range wide-angle visibility, compactness, longevity and the need for colour change indication. A two-colour indicator module developed for the Hydrastep display is explained, and is extended to multi-colour module designs Outlines are given for some applications of such indicators to a variety of problems of display and information transfer.

Enhanced Thermal Dissipation and Light Output of GaN/Sapphire Light-Emitting Diode by Direct Cu Electroplating

2019 ◽  
Vol 13 (3) ◽  
pp. 13-18 ◽  
Author(s):  
C. C. Chiang ◽  
R. H. Horng ◽  
D. S. Wuu ◽  
H. Y. Hsiao ◽  
C. Y. Hsieh ◽  
...  
Keyword(s):  
Light Emitting Diode ◽  
Light Output ◽  
Thermal Dissipation ◽  
Light Emitting ◽  
Cu Electroplating
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