Assessment of current density singularity in electromigration of solder bumps

2011 ◽  
Author(s):  
Pridhvi Dandu ◽  
Xuejun Fan
Keyword(s):  
Current Density ◽  
Solder Bumps ◽  
Density Singularity

Diagram of Electromigration Pattern in Eutectic Pb-Sn and Pb-Free Solders

2005 ◽  
Vol 297-300 ◽  
pp. 837-843
Author(s):  
Takashi Hasegawa ◽  
Masumi Saka
Keyword(s):  
Current Density ◽  
Solder Bump ◽  
High Density ◽  
Solder Bumps ◽  
Multi Phase ◽  
High Density Packaging

Solder is the most frequently used alloy, which serves as the bonding metal for electronics components. Recently, the interconnected bump is distinctly downsizing its bulk along with the integration of high-density packaging. The evaluation of electromigration damage for solder bumps is indispensable. Hence, it is fairly urgent to understand the mechanism of the electromigration damage to be capable of securing reliability of the solder bump and ultimately predicting its failure lifetime. Electromigration pattern in multi-phase material is determined by the combination of current density, temperature and current-applying time. In this paper, diagram of electromigration pattern (DEP) in solders is presented, where both of eutectic Pb-Sn and Pb-free solders are treated. DEP gives the basis for discussing and predicting the electromigration damage in solders.

Lead-Free and PbSn Bump Electromigration Testing

2005 ◽  
Author(s):  
Stephen Gee ◽  
Nikhil Kelkar ◽  
Joanne Huang ◽  
King-Ning Tu
Keyword(s):  
Cross Sections ◽  
Current Density ◽  
Critical Issue ◽  
Electronics Industry ◽  
Limiting Factor ◽  
Time To Failure ◽  
Solder Bumps ◽  
Free Solder ◽  
Mean Time ◽  
Eutectic Snpb

As the electronics industry continues to push for miniaturization, several reliability factors become vital issues. The demand for a high population of smaller and smaller solder bumps, while also increasing the current, have resulted in a significant increase in the current density. As outlined in the International Technology of Roadmap for Semiconductors (ITRS), this trend makes electromigration the limiting factor in high density packages. The heightened current density and correspondingly elevated operating temperatures are a critical issue in reliability since these factors facilitate the effects of electromigration. Therefore, as bump sizes continue to decrease, the study of electromigration reliability becomes crucial in order to understand and possibly prevent the causes of failure. A systematic study of electromigration in eutectic SnPb and Pb-free solder bumps was conducted in order to characterize the reliability of the Micro SMD package family. The testing includes both eutectic 63Sn-37Pb and 95.5Sn4.0Ag-0.5Cu solder bumps on an Al/Ni(V)/Cu under-bump-metallization. Mean-time-to-failure results are compared to Black’s Equation and cross-sections of the solder bumps are shown to analyze the mechanisms that led to failure.

Prediction of Electromigration Critical Current Density in Passivated Arbitrary-Configuration Interconnect

2019 ◽  
Vol 141 (2) ◽  
Author(s):  
Yasuhiro Kimura ◽  
Masumi Saka
Keyword(s):  
Critical Current Density ◽  
Critical Current ◽  
Current Density ◽  
Flip Chip ◽  
Electrical Potential ◽  
Atomic Density ◽  
Configuration Model ◽  
Chip Technology ◽  
Arbitrary Configuration ◽  
Solder Bumps

A critical current density, a criterion of electromigration (EM) resistance in interconnects, above which EM damages initiate has been studied to minimize EM damages of interconnects. In general, the assessment of a critical current density is confined to straight interconnect called as Blech specimen, although the critical current density is sensitive to structural characteristic. This work proposes a procedure of predicting a critical current density for any arbitrary-configuration interconnect by using the analogy between atomic density and electrical potential. In the models of straight and barrel interconnects as the typical solder bumps in modern flip-chip technology, the critical current density is predicted through calculating electrical potential by proposed formulation and simulation based on the finite element analysis (FEA). The critical current density for straight interconnect obtained by experiment leads to numerically calculate the critical electrical potential, which is independent of interconnect configuration. The critical potential corresponds to the critical atomic density, below which the accumulation of atoms allows. The calculated critical electrical potential determines a critical current density for arbitrary-configuration interconnect including current crowding effect. This finding can predict a critical current density for actual arbitrary-configuration model and provide an insight for the applying to the packaging design such as ball grid array and C4 flip-chip solder bumps.

Study of Void Formation Mechanism in Electroplated SnAg Solder Bump

2016 ◽  
Vol 2016 (1) ◽  
pp. 000638-000643
Author(s):  
Koji Tatsumi ◽  
Akio Sakai ◽  
Syunsuke Kawai ◽  
Takuma Katase ◽  
Takashi Miyazawa ◽  
...  
Keyword(s):  
Formation Mechanism ◽  
Electrolyte Solution ◽  
Current Density ◽  
Solder Bump ◽  
Cathode Surface ◽  
Void Formation ◽  
Gas Generation ◽  
Solder Bumps ◽  
Snag Solder ◽  
The Cross

Abstract SnAg electroplating method is widely used in the formation of LF solder bump for flip chip connection. While electroplating is able to form void free solder bump in a suitable operating condition, void may occur suddenly when used in mass production. This study aims at understanding the gas source in the void of electroplated SnAg solder bumps and determining the manufacturing process factors which affect the void formation. There are various types of void formation mode. One mode is H2 gas generation on cathode surface during electroplating. Both the cross-sections of solder bumps, as well as an analysis data of the gas in the void taken by the TDS (Thermal Desorption Spectrometry) were evaluated. The cross-section of the solder bump which contains void due to the reflow process revealed the existence of several tens of nm to several μm size pits in the solder bump before reflow. TDS analysis indicates that the pits consisted of mainly H2O, H2 and the decomposition of organics. A possible void formation mechanism is the evaporation of H2 gas and the incorporated electrolyte solution in the bump by reflow. These pits in the solder were caused by various process parameters. One of the causes is due to the setting of the current density in the SnAg electroplating process being inappropriate. The current density should be adjusted corresponding to the electrolyte performance and bump design such as PR thickness, opening diameter and bump density. The computer simulation demonstrated that a thick PR limits the diffusion of the Sn2+ ions into via holes and having the current density too high causes a lack of Sn2+ ions on the cathode surface and causes H2 gas generation. The other mode of void formation is Ag displacement of the under bump metallization (UBM) surface in dwell time in the SnAg electrolyte solution before the start of plating. The adjustment of each process parameter can eliminate the source of the void and achieve a high reliability of SnAg bump formation.

Failure of Flip-Chip Circuit Interconnects under High Current Density

2010 ◽  
Vol 118-120 ◽  
pp. 449-453
Author(s):  
Yu Dong Lu ◽  
Xiao Qi He ◽  
Yun Fei En ◽  
Xin Wang ◽  
Zhi Qiang Zhuang
Keyword(s):  
Current Density ◽  
Flip Chip ◽  
Chemical Potential ◽  
High Current Density ◽  
Potential Gradient ◽  
High Current ◽  
Wind Force ◽  
Chemical Potential Gradient ◽  
Solder Bumps ◽  
Electron Wind

Both Al interconnects and flip-chip solder bumps were sensitive to high current. The failure mechanism of circuits interconnects would be more complicated if the current density in circuits was exceed the critical magnitudes of electromigration in both Al interconnects and solder bumps. The failure of circuit interconnects under different magnitudes of current density was studied and the interaction of electromigration in solder bumps and Al interconnects was discussed. The circuit interconnects of flip chip show three failure phenomena under high current density: voids in Al final metal, inter-diffusion of Al and SnPb, and melting of solder bumps. The voids in Al metal show the directional diffusion of Al atoms was mainly controlled by the electron wind fore. However the inter-diffusion of Al and SnPb demonstrated the electron wind force to Sn and Pb atoms would be ignored in contrast with chemical potential gradient or intrinsic stress. The flow of Sn and Pb atoms under high current density was in opposite direction with electron wind force and uniform with chemical potential gradient.

Microstructural Evolution During Electromigration in Eutectic SnAg Solder Bumps

2005 ◽  
Vol 20 (9) ◽  
pp. 2432-2442 ◽  
Author(s):  
Y.H. Chen ◽  
T.L. Shao ◽  
P.C. Liu ◽  
Chih Chen ◽  
T. Chou
Keyword(s):  
Microstructural Evolution ◽  
Current Density ◽  
Electron Flow ◽  
Under Bump Metallization ◽  
Substrate Side ◽  
Current Stressing ◽  
Solder Bumps ◽  
Cathode Substrate ◽  
Snag Solder ◽  
A Current

Microstructural changes induced by electromigration were studied in eutectic SnAg solder bumps jointed to under-bump metallization (UBM) of Ti/Cr–Cu/Cu and pad metallization of Cu/Ni/Au. Intermetallic compounds (IMCs) and phase transformations were observed during a current stress of 1 × 104 A/cm2 at 150 °C. On the cathode/substrate side, some of the (Cuy,Ni1−y)6Sn5 transformed into (Nix,Cu1−x)3Sn4 due to depletion of Cu atoms caused by the electron flow. It is found that both the cathode/chip and anode/chip ends could be failure sites. On the cathode/chip side, the UBM dissolved after current stressing for 22 h, and failure may occur due to depletion of solder. On the anode/chip side, a large amount of (Cuy,Ni1−y)6Sn5 or (Nix,Cu1−x)3Sn4 IMCs grew at the low-current-density area due to the migration of Ni and Cu atoms from the substrate side, which may be responsible for the electromigration failure at this end.

Long-term Electromigration Study of Lead-Free Flip-Chips with Solder Bumps with 50 μm or 60 μm Diameter Employing ENIG Surface Finish on Both Chip and Substrate Side

2013 ◽  
Vol 2013 (1) ◽  
pp. 000523-000530 ◽  
Author(s):  
Marek Gorywoda ◽  
Rainer Dohle ◽  
Stefan Härter ◽  
Andreas Wirth ◽  
Jörg Goßler ◽  
...  
Keyword(s):  
Current Density ◽  
Surface Finish ◽  
Flip Chip ◽  
Solder Joints ◽  
High Current Density ◽  
Life Time ◽  
Lead Free ◽  
Cathode Side ◽  
Solder Bumps

Electromigration behaviour of Pb-free solder joints in flip-chip interconnects is usually studied in highly accelerated, short-term experiments using high current density and temperature. Failures typically occur in bumps which are in cathode contact at the chip side. There are only a few published studies in which Electroless Ni-P/Immersion Au (ENIG) surface finish was used as under-bump-metallization (UBM) structure, e.g. [5]. This paper deals with the long-term electromigration behaviour of Pb-free SAC305 flip-chip solder joints with a pitch of 100 μm and solder bump diameters of 50 μm or 60 μm, respectively. The ENIG surface finish was used on both the substrate and chip side. Test specimens were subjected to several levels of temperature and current density and tested up to 16,000 hours. The life time data is summarized using Weibull and lognormal distribution. The microstructure changes of interconnects in failed samples were subsequently investigated by SEM and EDX. Interconnects had failed due to consumption of Nickel, voids caused by electromigration, and Kirkendall void formation in the Ni-P-layer. The damage was asymmetric in respect to the current flow direction through the solder bumps and was most pronounced at the cathode side. Unexpectedly, however, the most severe damage occurred at the substrate and not at the chip side. We could show that - allowing for a few guidelines - lead-free flip-chip solder joints with 50 μm or 60 μm diameter have a sufficient electromigration life time for most applications.

Electromigration Reliability of Glass Ceramic Multilayer Substrate with Various Surface Finishes

2012 ◽  
Vol 2012 (1) ◽  
pp. 000503-000509
Author(s):  
Hiroshi Matsumoto ◽  
Akira Wakazaki ◽  
Shingo Sato ◽  
Takashi Okunosono ◽  
Chihiro Makihara
Keyword(s):  
Life Cycle ◽  
Current Density ◽  
Glass Ceramic ◽  
High Speed ◽  
Flip Chip ◽  
Solder Joints ◽  
Diffusion Rate ◽  
Ceramic Substrate ◽  
Solder Bumps ◽  
Glass Ceramic Substrate

The process speed of high-end servers and supercomputers are steadily increasing. As a result, the backbone of the high speed processing, such as high-end LSI (flip-chip type), and associated substrate circuits is also becoming more dense and miniaturized, while supporting higher current densities. However, recent studies indicate that the higher current density triggers an electromigration (EM) at the solder bumps connecting the under bump metallurgy (UBM) of the flip-chip pad (e.g. Ni) and substrate pads (e.g. Ni/Au). This electromigration leads to voids within the solder joints, which may result in an open circuit. As of result, the life-cycle of the packaged devices is shortened. Thus solution to the EM issue is critical. To respond to such concerns, we have studied the mechanism of the void development, by closely examining differences in diffusion rate among the connective metals - within the pads and the solders. We have mitigated the EM occurrence by reducing the differences in diffusion rate by utilizing high purity Cu for the substrate metallization pads, Cu exhibits a diffusion rate similar to Sn used in solder bumps. Also, solder wettability was improved by utilizing a solder on pad (SOP) construction. As of result we were able to successfully demonstrate an improved life-cycle of the flip-chip solder joints, while accommodating a higher current density. Furthermore, a glass ceramic substrate was used for our study. Since this particular glass ceramic substrate has a coefficient of thermal expansion of 11.8ppm/K, there is an improvement in 1st and 2nd level reliabilities associated with thermal stress from device heat generation. At the same time, it possesses a dielectric constant of 5.8, which is conductive with superior electrical performance (high speed and high frequency). Thus, this glass ceramic substrate is capable of supporting increases in current density, while sustaining high reliability.

Activated Prominences; Mechanisms for Activation and Eruption

1979 ◽  
Vol 44 ◽  
pp. 307-313
Author(s):  
D.S. Spicer
Keyword(s):  
Pressure Gradient ◽  
Density Gradient ◽  
Current Density ◽  
Convective Instability ◽  
Tearing Mode ◽  
Magnetic Shear ◽  
Long Wavelength ◽  
Ideal Mhd ◽  
Gradient Change ◽  
Accelerated Particles

A possible relationship between the hot prominence transition sheath, increased internal turbulent and/or helical motion prior to prominence eruption and the prominence eruption (“disparition brusque”) is discussed. The associated darkening of the filament or brightening of the prominence is interpreted as a change in the prominence’s internal pressure gradient which, if of the correct sign, can lead to short wavelength turbulent convection within the prominence. Associated with such a pressure gradient change may be the alteration of the current density gradient within the prominence. Such a change in the current density gradient may also be due to the relative motion of the neighbouring plages thereby increasing the magnetic shear within the prominence, i.e., steepening the current density gradient. Depending on the magnitude of the current density gradient, i.e., magnetic shear, disruption of the prominence can occur by either a long wavelength ideal MHD helical (“kink”) convective instability and/or a long wavelength resistive helical (“kink”) convective instability (tearing mode). The long wavelength ideal MHD helical instability will lead to helical rotation and thus unwinding due to diamagnetic effects and plasma ejections due to convection. The long wavelength resistive helical instability will lead to both unwinding and plasma ejections, but also to accelerated plasma flow, long wavelength magnetic field filamentation, accelerated particles and long wavelength heating internal to the prominence.

Microstructural characterization of YBa2Cu3O7-x thin films formed by metalorganic CVD

1991 ◽  
Vol 49 ◽  
pp. 1080-1081
Author(s):  
P. Lu ◽  
W. Huang ◽  
C.S. Chern ◽  
Y.Q. Li ◽  
J. Zhao ◽  
...  
Keyword(s):  
Thin Film ◽  
Thin Films ◽  
Critical Current Density ◽  
Critical Current ◽  
Current Density ◽  
Film Growth ◽  
Chemical Vapor ◽  
Microstructural Characterization ◽  
Ion Milling ◽  
Conventional Grinding

The YBa2Cu3O7-x thin films formed by metalorganic chemical vapor deposition(MOCVD) have been reported to have excellent superconducting properties including a sharp zero resistance transition temperature (Tc) of 89 K and a high critical current density of 2.3x106 A/cm2 or higher. The origin of the high critical current in the thin film compared to bulk materials is attributed to its structural properties such as orientation, grain boundaries and defects on the scale of the coherent length. In this report, we present microstructural aspects of the thin films deposited on the (100) LaAlO3 substrate, which process the highest critical current density.Details of the thin film growth process have been reported elsewhere. The thin films were examined in both planar and cross-section view by electron microscopy. TEM sample preparation was carried out using conventional grinding, dimpling and ion milling techniques. Special care was taken to avoid exposure of the thin films to water during the preparation processes.

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