Reliability study of high-end Pb-free CBGA solder joint under various thermal cycling test conditions

Author(s):  
Dongji Xie ◽  
Vadim Gektin ◽  
David Geiger
2021 ◽  
Vol 18 (2) ◽  
pp. 29-39
Author(s):  
John H Lau ◽  
Cheng-Ta Ko ◽  
Chia-Yu Peng ◽  
Kai-Ming Yang ◽  
Tim Xia ◽  
...  

Abstract In this study, the reliability of the solder joints of a heterogeneous integration of one large chip (10 × 10 mm) and two smaller chips (7 × 5 mm) by a fan-out method with a redistribution layer-first substrate fabricated on a 515 × 510-mm panel is investigated. Emphasis is placed on the thermal cycling test (−55°C Δ 125°C, 50-min cycle) of the heterogeneous integration package on a printed circuit board (PCB). The thermal cycling test results are plotted into a Weibull distribution. The Weibull slope and characteristic life at median rank are presented. At 90% confidence, the true Weibull slope and the true 10% life interval are also provided. A linear acceleration factor is adopted to map the solder joint reliability at the test condition to the solder joint reliability at an operating condition. The failure location and failure mode of the PCB assembly of the heterogeneous integration package are provided and discussed. A nonlinear, time- and temperature-dependent 3-D finite element simulation is performed for the heterogeneous integration PCB assembly and correlated with the thermal cycling test results.


2005 ◽  
Vol 128 (3) ◽  
pp. 281-284 ◽  
Author(s):  
Tong Hong Wang ◽  
Chang-Chi Lee ◽  
Yi-Shao Lai ◽  
Yu-Cheng Lin

In this work, thermal characteristics of a board-level chip-scale package, subjected to coupled power and thermal cycling test conditions defined by JEDEC, are investigated through the transient thermal analysis. Tabular boundary conditions are utilized to deal with time-varying thermal boundary conditions brought by thermal cycling. It is obvious from the analysis that the presence of power cycling leads to a significant deviation of the junction temperature from the thermal cycling profile. However, for components away from the die, the deviation is insignificant. Moreover, for low-power applications, temperature histories from coupled power and thermal cycling are approximately linear combinations of temperature histories from pure power cycling and the ones from pure thermal cycling.


2021 ◽  
Vol 18 (2) ◽  
pp. 67-80
Author(s):  
John H Lau ◽  
Cheng-Ta Ko ◽  
Chia-Yu Peng ◽  
Tzvy-Jang Tseng ◽  
Kai-Ming Yang ◽  
...  

Abstract In this study, the reliability of the solder joints of a six-side molded panel-level chip-scale package (PLCSP) is investigated. Emphasis is placed on the thermal cycling test (−55°C Δ 125°C, 50-min cycle) of the six-side molded PLCSP on a printed circuit board. For comparison purpose, the one without six-side molded (ordinary) PLCSP is also subjected to the same test. The thermal cycling test results are plotted into a Weibull distribution, and the true Weibull slope and true characteristic life at 90% confidence are presented. The solder joint mean life ratio of these two cases and its confidence level are also determined. Furthermore, their solder joint failure location and failure mode are provided. Finally, a nonlinear, time- and temperature-dependent 3-D finite element simulation is performed for these two cases and correlated with the thermal cycling test results.


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