Degradation Mechanism and Reliability of Flip-Chip Interconnects using Anisotropic Conductive Adhesives for High Current Density Packaging Applications

2006 ◽  
Author(s):  
Myung Jin Yim ◽  
Hyoung Joon Kim ◽  
Chang Kyu Chung ◽  
Kyung Wook Paik
Keyword(s):  
Current Density ◽  
Flip Chip ◽  
High Current Density ◽  
Degradation Mechanism ◽  
High Current ◽  
Conductive Adhesives

Investigation of Electromigration Degradation Mechanism in Ti/Pt/Au Ohmic Contacts to p-GaAs Under High Current Density Stress

2017 ◽  
Vol 64 (11) ◽  
pp. 4581-4586 ◽  
Author(s):  
Yanbin Qiao ◽  
Dongyan Zhao ◽  
Yanning Chen ◽  
Jin Shao ◽  
Haifeng Zhang ◽  
...  
Keyword(s):  
Current Density ◽  
Ohmic Contacts ◽  
High Current Density ◽  
Degradation Mechanism ◽  
High Current

Effect of h-BN/EP and BNNS/EP Composite Materials on the Reliability of Flip Chip

2021 ◽  
Author(s):  
ZK Li ◽  
Zhekun Fan ◽  
Long Dou ◽  
Zhong Jin ◽  
Zhan Liu ◽  
...  
Keyword(s):  
Thermal Conductivity ◽  
Finite Element ◽  
Current Density ◽  
Flip Chip ◽  
High Current Density ◽  
Electronic Devices ◽  
Thermal Interface Materials ◽  
High Current ◽  
Thermal Interface ◽  
Interface Materials

Abstract Under the action of electro-thermal-mechanical coupling, the failure and performance degradation of electronic devices are prone to occur, which has become a particularly important reliability problem in microelectronic packaging. The improvement of flip chip reliability by using thermal interface materials was studied. First, a three-dimensional finite element model of the flip-chip packaging system, and finite element simulation of electric-thermal-force multi-field coupling were conducted, and the Joule heating, temperature distribution, thermal stress and deformation of the flip-chip under high current density was analyzed. At the same time, the influence of thermal interface material thermal conductivity and operating current on flip chip reliability was studied. Then, the reliability experiment of the flip chip connected to the radiator under high current density was performed, and the temperature change in the flip chip under different thermal interface materials was obtained. Finally, through the combination of experiment and simulation, the influence of thermal interface materials on flip chip reliability was analyzed. It is further confirmed that the reliability and service life of electronic devices were effectively improved by using the high thermal conductivity BNNS/epoxy composite material prepared in this paper.

Failure of Flip-Chip Circuit Interconnects under High Current Density

2010 ◽  
Vol 118-120 ◽  
pp. 449-453
Author(s):  
Yu Dong Lu ◽  
Xiao Qi He ◽  
Yun Fei En ◽  
Xin Wang ◽  
Zhi Qiang Zhuang
Keyword(s):  
Current Density ◽  
Flip Chip ◽  
Chemical Potential ◽  
High Current Density ◽  
Potential Gradient ◽  
High Current ◽  
Wind Force ◽  
Chemical Potential Gradient ◽  
Solder Bumps ◽  
Electron Wind

Both Al interconnects and flip-chip solder bumps were sensitive to high current. The failure mechanism of circuits interconnects would be more complicated if the current density in circuits was exceed the critical magnitudes of electromigration in both Al interconnects and solder bumps. The failure of circuit interconnects under different magnitudes of current density was studied and the interaction of electromigration in solder bumps and Al interconnects was discussed. The circuit interconnects of flip chip show three failure phenomena under high current density: voids in Al final metal, inter-diffusion of Al and SnPb, and melting of solder bumps. The voids in Al metal show the directional diffusion of Al atoms was mainly controlled by the electron wind fore. However the inter-diffusion of Al and SnPb demonstrated the electron wind force to Sn and Pb atoms would be ignored in contrast with chemical potential gradient or intrinsic stress. The flow of Sn and Pb atoms under high current density was in opposite direction with electron wind force and uniform with chemical potential gradient.

Rapid degradation mechanism of Ni-CGO anode in low concentrations of H2 at a high current density

2011 ◽  
Vol 36 (14) ◽  
pp. 8461-8467 ◽  
Author(s):  
Gang Chen ◽  
Guoqing Guan ◽  
Shawket Abliz ◽  
Yutaka Kasai ◽  
Abuliti Abudula
Keyword(s):  
Current Density ◽  
High Current Density ◽  
Degradation Mechanism ◽  
High Current ◽  
Rapid Degradation ◽  
Low Concentrations

Fabrication of high-power flip-chip blue and white LEDs operating under high current density

2004 ◽  
Vol 1 (10) ◽  
pp. 2401-2404 ◽  
Author(s):  
D. A. Zakheim ◽  
I. P. Smirnova ◽  
E. M. Arakcheeva ◽  
M. M. Kulagina ◽  
S. A. Gurevich ◽  
...  
Keyword(s):  
Current Density ◽  
High Power ◽  
Flip Chip ◽  
High Current Density ◽  
High Current ◽  
White Leds

Electromigration Behavior in Sn-37Pb and Sn-3.0Ag-0.5Cu Flip-Chip Solder Joints under High Current Density

2008 ◽  
Vol 38 (1) ◽  
pp. 70-77 ◽  
Author(s):  
Sang-Su Ha ◽  
Jong-Woong Kim ◽  
Jeong-Won Yoon ◽  
Sang-Ok Ha ◽  
Seung-Boo Jung
Keyword(s):  
Current Density ◽  
Flip Chip ◽  
Solder Joints ◽  
High Current Density ◽  
High Current

Development of a Novel Test Setup to Study the Combined Effects of Electromigration and Mechanical Stress in Solder Interconnects

2020 ◽  
Author(s):  
Mahsa Montazeri ◽  
David R. Huitink
Keyword(s):  
Tensile Stress ◽  
Thermal Cycling ◽  
Current Density ◽  
Flip Chip ◽  
High Current Density ◽  
Operating Conditions ◽  
Reliability Estimation ◽  
High Current ◽  
Test Setup ◽  
Solder Interconnects

Abstract One key concern that arises from scaling of device interconnects with increasing power density requirements is electromigration (EM). On the other hand, thermal cycling fatigue has always been a reliability challenge in solder interconnects. Variations in device temperature caused by environmental or operating conditions induce stress in solders, as they usually connect two components with different coefficients of thermal expansion (CTE). These thermally induced stresses may lead to crack formation within the solders. The combination of EM effects and thermal cycling add to the complexity of the reliability estimation for high current density applications. In this work, a novel test setup has been designed and developed to estimate the reliability of solder interconnects under high current density, while a constant tensile stress is also applied to the solder interconnect. The test set up offers the ability to test up to four samples at the same time. Additionally, the test samples are fabricated with two copper wires connected by Pb/Sn solder to imitate copper UBM in a flip-chip bonding connection. Strain in solder is measured by monitoring the elongation of the wire during testing, while failure of the connection is detected by continuous monitoring of the electrical resistance. The experiment is conducted for conditions including pure tensile stress, pure EM and coupled EM and tensile stress where a significant reduction in life-time is observed for the coupled degradation effects. Comparing the experimental results of different current densities at different stress levels will help in identifying the nature of degradation in solders, which will help inform the drive for miniaturization.

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