Solder joint reliability of fine pitch surface mount technology assemblies

1990 ◽  
Vol 13 (3) ◽  
pp. 534-544 ◽  
Author(s):  
J. Lau ◽  
L.M. Powers-Maloney ◽  
J.R. Baker ◽  
D. Rice ◽  
B. Shaw
Keyword(s):  
Solder Joint ◽  
Surface Mount Technology ◽  
Solder Joint Reliability ◽  
Surface Mount ◽  
Joint Reliability ◽  
Fine Pitch

Surface Mount Technology (SMT) Substrate Material Requirements - A Brief Review

1987 ◽  
Vol 108 ◽  
Author(s):  
A. Mahammad Ibrahim
Keyword(s):  
Dielectric Constant ◽  
Solder Joint ◽  
Thermal Cycling ◽  
Substrate Material ◽  
Surface Mount Technology ◽  
Solder Joint Reliability ◽  
Surface Mount ◽  
Printed Circuit ◽  
Joint Reliability ◽  
Out Of Plane

ABSTRACTThe state of the art for the printed circuit (pc) industry is the Surface Mount Technology (SMT) using leadless ceramic chip carriers (LCCCs). The SMT technique is used to design, fabricate, and assemble affordable high-speed, high-density electronic modules with reduced size and weight. However, to take full advantage of the SMT, new high-performance printed circuit board (PCB) substrate materials must be developed, especially if the goal is to satisfy the high reliability required in military applications. The most critical requirement is matching the in-plane coefficient of thermal expansion (CTE) with the SMT-PCB's and the chip carriers (LCCCs) to reduce the solderjoint stresses during thermal cycling. Solder-joint reliability can be improved significantly by tailoring the in-plane CTE to approximately 6–7 ppm/°C (of the alumina chip carrier) using Kevlar and/or quartz fabric-reinforced polymer composites, instead of conventional glass composites. Less attention has been focussed on other important requirements, e.g., out-of-plane (Z-axis) expansion, glass transition temperature (Tg), dielectric constant, and resin microcracking, which also play important roles in the overall performance of the substrate materials. For example, high Z-expansion puts additional strain on the plated through holes (PTH), thereby affecting PTR reliability. A low Tg significantly increases the amount of thermal stress imposed during thermal cycling on solder joints and PTH, and leads to failures. This paper contains a brief review of the requirements of a SMT-PCB substrate material, including such critical parameters as: in-plane CTE, out-of-plane CTE, Tg, dielectric constant, fiber-to-resin ratio, and resin microcracking, and their effects on solder joint reliability, PTH reliability, dimensional stability, and electrical performance.

Board level solder joint reliability analysis of a fine pitch Cu post type wafer level package (WLP)

2008 ◽  
Vol 48 (4) ◽  
pp. 602-610 ◽  
Author(s):  
Xiaowu Zhang ◽  
Vaidyanathan Kripesh ◽  
T.C. Chai ◽  
Teck Chun Tan ◽  
D. Pinjala
Keyword(s):  
Solder Joint ◽  
Reliability Analysis ◽  
Wafer Level ◽  
Solder Joint Reliability ◽  
Joint Reliability ◽  
Fine Pitch ◽  
Board Level ◽  
Wafer Level Package

Estimating the Vibration Fatigue Life of Quad Leaded Surface Mount Components

1993 ◽  
Vol 115 (2) ◽  
pp. 195-200 ◽  
Author(s):  
D. B. Barker ◽  
Y. S. Chen ◽  
A. Dasgupta
Keyword(s):  
Finite Element ◽  
Fatigue Life ◽  
Solder Joint ◽  
Finite Element Modeling ◽  
Stress Analysis ◽  
Empirical Equation ◽  
Solder Joint Reliability ◽  
Surface Mount ◽  
Joint Reliability ◽  
Vibration Fatigue

This paper discusses the assumptions and details of the fatigue life calculations required to predict the fatigue life of quad leaded surface mount components operating in a vibration environment. A simple approximate stress analysis is presented that does not require complex finite element modeling, nor does it reduce the problem to a simple empirical equation or rule of thumb. The goal of the new method is to make PWB vibration solder joint reliability information available to the designer as early as possible and in an easily understood and implemented manner.

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