A closed-form back-gate-bias related inverse narrow-channel effect model for deep-submicron VLSI CMOS devices using shallow trench isolation
2000 ◽
Vol 47
(4)
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pp. 725-733
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1993 ◽
Vol 40
(4)
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pp. 755-765
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2002 ◽
Vol 49
(10)
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pp. 1736-1741
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2011 ◽
Vol 32
(6)
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pp. 064004
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1998 ◽
Vol 16
(3)
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pp. 1502-1508
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