Interface state creation and charge trapping in the medium-to-high gate voltage range (V/sub d//2<or=V/sub g/>or=V/sub d/) during hot-carrier stressing of n-MOS transistors
1990 ◽
Vol 37
(3)
◽
pp. 744-754
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Keyword(s):
Keyword(s):
1992 ◽
Vol 39
(2)
◽
pp. 458-464
◽
2018 ◽
Vol 2018
◽
pp. 1-9
◽
Keyword(s):
1990 ◽
Vol 37
(8)
◽
pp. 1869-1876
◽
1988 ◽
Vol 49
(C4)
◽
pp. C4-651-C4-655
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Keyword(s):
Keyword(s):