An analytical drain current model considering both electron and lattice temperatures simultaneously for deep submicron ultrathin SOI NMOS devices with self-heating

1995 ◽  
Vol 42 (5) ◽  
pp. 899-906 ◽  
Author(s):  
Yu-Guang Chen ◽  
Shyh-Yih Ma ◽  
J.B. Kuo ◽  
Zhiping Yu ◽  
R.W. Duton
2000 ◽  
Vol 21 (5) ◽  
pp. 239-241 ◽  
Author(s):  
J.B. Roldan ◽  
F. Gamiz ◽  
J.A. Lopez-Villanueva ◽  
P. Cartujo-Cassinello

2019 ◽  
Vol 9 (2) ◽  
pp. 291-297
Author(s):  
Hind Jaafar ◽  
Abdellah Aouaj ◽  
Ahmed Bouziane ◽  
Benjamin Iñiguez

Background: A novel Dual Material Gate Graded Channel and Dual Oxide Thickness Cylindrical Gate (DMG-GC-DOT) MOSFET is presented in this paper. Methods: Analytical model of drain current is developed using a quasi-two-dimensional cylindrical form of the Poisson equation and is expressed as a function of the surface potential, which is calculated using the expressions of the current density. Results: Comparison of the analytical results with 3D numerical simulations using Silvaco Atlas - TCAD software presents a good agreement from subthreshold to strong inversion regime and for different bias voltages. Conclusion: Two oxide thicknesses with different permittivity can effectively improve the subthreshold current of DMG-GC-DOT MOSFET.


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