Nanoscale metal transistor control of Fowler–Nordheim tunneling currents through 16 nm insulating channel

1999 ◽  
Vol 85 (9) ◽  
pp. 6912-6916 ◽  
Author(s):  
Kouji Fujimaru ◽  
Ryouta Sasajima ◽  
Hideki Matsumura
Keyword(s):  
Tunneling Currents ◽  
Nordheim Tunneling

Measurement of Fowler-Nordheim tunneling currents in MOS structures under charge trapping conditions

1985 ◽  
Vol 28 (7) ◽  
pp. 717-720 ◽  
Author(s):  
Y. Nissan-Cohen ◽  
J. Shappir ◽  
D. Frohman-Bentchkowsky
Keyword(s):  
Charge Trapping ◽  
Tunneling Currents ◽  
Mos Structures ◽  
Nordheim Tunneling

Microroughness at the Si/SiO2 Interface from Pre-Oxidation Annealing, Measured Using Quantum Oscillations in Fowler-Nordheim Tunneling Currents

1992 ◽  
Vol 280 ◽  
Author(s):  
J. C. Poler ◽  
K. K. McKay ◽  
E. A. Irene
Keyword(s):  
Gate Dielectrics ◽  
Interface Roughness ◽  
Quantum Oscillation ◽  
Interfacial Region ◽  
Mos Capacitors ◽  
Quantum Oscillations ◽  
High Temperature Anneal ◽  
Afm Imaging ◽  
Tunneling Currents ◽  
Nordheim Tunneling

ABSTRACTAs design rules shrink to conform with ULSI device dimensions, gate dielectrics for MOSFET structures are required to be scaled to even thinner proportions. Upon scaling the gate oxides below ∼60Å some properties of the device, such as interface roughness, that are negligible for thicker films become critical and must be evaluated. Microroughness at the interface of ultrathin MOS capacitors has been shown to degrade these devices.We are studying the interfacial region of ∼50Å SiO2 on Si using the quantum oscillations in Fowler-Nordheim tunneling currents. The oscillations are sensitive to the electron potential and abruptness of the film and its interfaces. In particular, inelastic scattering and/or thickness inhomogeneities in the film will reduce the amplitude of the oscillations. We are using the amplitude of the oscillations to examine the degree of microroughness at the interface that results from a pre-oxidation high temperature anneal in an inert ambient containing various amounts of H2O. Preliminary AFM imaging has shown correlations supporting our microroughness interpretation of the quantum oscillation amplitudes.

Stress Induced Increased Low Level Leakage in Thin Oxides

1992 ◽  
Vol 284 ◽  
Author(s):  
D. J. Dumin ◽  
J. R. Maddux ◽  
D.-P. Wong
Keyword(s):  
Schottky Barrier ◽  
Stress Measurement ◽  
Tunneling Current ◽  
Schottky Emission ◽  
Leakage Currents ◽  
Gate Oxides ◽  
Low Level ◽  
Tunneling Currents ◽  
Best Fit ◽  
Nordheim Tunneling

ABSTRACTIt has been observed that the low-level, pre-tunneling currents through thin gate oxides increased after the oxides had been stressed at high voltages. The number of traps inside of the oxide generated by the stress has been shown to increase as the 1/3 power of the fluence that had passed through the oxide during the stress. The increases in the low-level, pre-tunneling currents have been shown to be proportional to the number of stress generated traps in the oxide and not to the fluence during the stress. The voltage dependences of the excess low-level leakage currents were stress and measurement polarity dependent. Attempts have been made to fit the voltage dependences of the excess low-level currents to Fowler-Nordheim tunneling, Frenkel-Poole conduction or Schottky barrier lowering. The increase in the portion of the low-level, pre-tunneling current that was not dependent on stress/measurement polarity sequence was best fit using Schottky emission currents. The model that has been developed to describe the increases in the low-level currents has centered on trap-assisted currents through the oxides.

Two-Band Tunneling Currents and Stress-Induced Leakage in Ultra-Thin SiO2 Films

1999 ◽  
Vol 567 ◽  
Author(s):  
S. Okhonin ◽  
A. Ils ◽  
D. Bouvet ◽  
P. Fazan ◽  
G. Guegan ◽  
...  
Keyword(s):  
Valence Band ◽  
Conduction Band ◽  
Electron Tunneling ◽  
Interface Trap Density ◽  
Current Voltage ◽  
Current Voltage Characteristics ◽  
Tunneling Currents ◽  
Stress Induced Leakage Current ◽  
Valence Band Electron ◽  
Nordheim Tunneling

ABSTRACTThe conduction band and valence band electron tunneling currents in ultra-thin SiO2 films at the transition from direct to Fowler-Nordheim tunneling regimes are studied. The slopes of the current voltage characteristics agree well with the simulations performed. The Stress-Induced Leakage Current (SILC) behavior is quite similar for both conduction and valence band currents even if the amplitude of the valence band SILC is much lower. We show that a linear dependence exists between the stress-induced interface trap density and both valence and conduction band SILC. A new model of SILC is also proposed.

The Effects of Interfacial Suboxide Transition Regions on Direct Tunneling in Oxide and Stacked Oxide-Nitride Gate Dielectrics

1999 ◽  
Vol 567 ◽  
Author(s):  
H. Yang ◽  
H Niimi ◽  
Y. Wu ◽  
G. Lucovsky
Keyword(s):  
Barrier Layer ◽  
Gate Dielectrics ◽  
Layer Model ◽  
Equivalent Thickness ◽  
Model Based ◽  
Direct Tunneling ◽  
Tunneling Currents ◽  
Nordheim Tunneling

ABSTRACTMesarjian et al. were the first to recognize the effects of suboxide interfacial transition regions at Si-SiO2 interfaces on tunneling oscillations in the Fowler-Nordheim regime. This paper extends these ideas to the direct tunneling regime and focuses on differences in interfacial transition regions between Si-SO2 interfaces with, and without monolayer level interface nitridation. Tunneling currents in both the direct and Fowler-Nordheim tunneling regimes are reduced by monolayer level interface nitridation for PMOS and NMOS devices with the same oxide-equivalent thickness. This paper develops a modified barrier layer model based on analysis of XPS results that accounts for these reductions in current in the direct tunneling regime.

Pre-Oxidation Anneal Kinetics: Interface Degradation of Thin SIO2 Films on Silicon

1992 ◽  
Vol 259 ◽  
Author(s):  
J.C. Poler ◽  
E.A. Irene
Keyword(s):  
High Temperature ◽  
Water Content ◽  
Time Scale ◽  
Dielectric Breakdown ◽  
Electrical Measurements ◽  
Sio2 Films ◽  
Direct Tunneling ◽  
High Temperature Anneal ◽  
Tunneling Currents ◽  
Nordheim Tunneling

ABSTRACTThe high temperature anneal of hydrogen terminated silicon has been shown to etch and roughen its surface. We attempt to describe the degree of this roughness and the time scale on which it occurs using several electrical measurements: excess direct tunneling currents, dielectric breakdown and the oscillations in the Fowler-Nordheim tunneling currents. From these results we draw conclusions on the time and water content dependence of pre-oxidation annealing on the microroughness of the Si/SiO2 interface.

The Effect of Roughness Features on Mos Surface Electric Field and Fowler-Nordheim Tunneling Behavior

1997 ◽  
Vol 473 ◽  
Author(s):  
Heng-Chih Lin ◽  
Edwin C. Kan ◽  
Toshiaki Yamanaka ◽  
Simon J. Fang ◽  
Kwame N. Eason ◽  
...  
Keyword(s):  
Electric Field ◽  
Three Dimensional ◽  
Tunneling Current ◽  
Gate Oxide ◽  
Oxide Thickness ◽  
Interface Roughness ◽  
Normal Electric Field ◽  
Surface Electric Field ◽  
Tunneling Behavior ◽  
Nordheim Tunneling

ABSTRACTFor future CMOS GSI technology, Si/SiO2 interface micro-roughness becomes a non-negligible problem. Interface roughness causes fluctuations of the surface normal electric field, which, in turn, change the gate oxide Fowler-Nordheim tunneling behavior. In this research, we used a simple two-spheres model and a three-dimensional Laplace solver to simulate the electric field and the tunneling current in the oxide region. Our results show that both quantities are strong functions of roughness spatial wavelength, associated amplitude, and oxide thickness. We found that RMS roughness itself cannot fully characterize surface roughness and that roughness has a larger effect for thicker oxide in terms of surface electric field and tunneling behavior.

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