Low‐temperature properties and phototransport in silicon‐on‐insulator films synthesized by oxygen implantation

1988 ◽  
Vol 63 (9) ◽  
pp. 4575-4579 ◽  
Author(s):  
George Papaioannou ◽  
Sorin Cristoloveanu ◽  
Peter Hemment
Keyword(s):  
Low Temperature ◽  
Silicon On Insulator ◽  
Oxygen Implantation

scholarly journals Fabrication and Packaging of CMUT Using Low Temperature Co-Fired Ceramic

Micromachines ◽  
2018 ◽  
Vol 9 (11) ◽  
pp. 553 ◽  
Author(s):  
Fikret Yildiz ◽  
Tadao Matsunaga ◽  
Yoichi Haga
Keyword(s):  
Low Temperature ◽  
Integrated Circuit ◽  
Flip Chip ◽  
Ultrasonic Transducer ◽  
Silicon On Insulator ◽  
Anodic Bonding ◽  
Lateral Side ◽  
Membrane Thickness ◽  
Bonding Performance ◽  
Complex Admittance

This paper presents fabrication and packaging of a capacitive micromachined ultrasonic transducer (CMUT) using anodically bondable low temperature co-fired ceramic (LTCC). Anodic bonding of LTCC with Au vias-silicon on insulator (SOI) has been used to fabricate CMUTs with different membrane radii, 24 µm, 25 µm, 36 µm, 40 µm and 60 µm. Bottom electrodes were directly patterned on remained vias after wet etching of LTCC vias. CMUT cavities and Au bumps were micromachined on the Si part of the SOI wafer. This high conductive Si was also used as top electrode. Electrical connections between the top and bottom of the CMUT were achieved by Au-Au bonding of wet etched LTCC vias and bumps during anodic bonding. Three key parameters, infrared images, complex admittance plots, and static membrane displacement, were used to evaluate bonding success. CMUTs with a membrane thickness of 2.6 µm were fabricated for experimental analyses. A novel CMUT-IC packaging process has been described following the fabrication process. This process enables indirect packaging of the CMUT and integrated circuit (IC) using a lateral side via of LTCC. Lateral side vias were obtained by micromachining of fabricated CMUTs and used to drive CMUTs elements. Connection electrodes are patterned on LTCC side via and a catheter was assembled at the backside of the CMUT. The IC was mounted on the bonding pad on the catheter by a flip-chip bonding process. Bonding performance was evaluated by measurement of bond resistance between pads on the IC and catheter. This study demonstrates that the LTCC and LTCC side vias scheme can be a potential approach for high density CMUT array fabrication and indirect integration of CMUT-IC for miniature size packaging, which eliminates problems related with direct integration.

An Electrical Characterization of Sol Films Using Devices Formed by Oxygen Implant and Rapid Thermal Processing

1987 ◽  
Vol 92 ◽  
Author(s):  
Jim D. Whitfield ◽  
Marie E. Burnham ◽  
Charles J. Varker ◽  
Syd.R. Wilson
Keyword(s):  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
High Energy ◽  
Thermally Grown Oxide ◽  
Silicon On Insulator ◽  
Wafer Surface ◽  
High Dose ◽  
Active Device ◽  
Insulating Layer ◽  
Oxygen Implantation

The advantages of Silicon-on-Insulator (SO) devices over bulk Silicon devices are well known (speed, radiation hardened, packing density, latch up free CMOS,). In recent years, much effort has been made to form a thin, buried insulating layer just below the active device region. Several approaches are being developed to fabricate such a buried insulating layer. One viable approach is by high dose, high energy oxygen implantation directly into the silicon wafer surface (1-3). With proper implant and annealing conditions, a thin stoichiometric buried oxide with a good crystalline quality silicon overlayer can be formed on which an epitaxial layer can be grown and functional devices and circuits built. As SO1 circuits become market viable, mass production tools and techniques are being developed and evaluated. Of particular interest here is the evaluation of high current oxygen implantation with rapid thermal processing on the electrical characteristics of the oxide-silicon interfaces, the silicon overlayer and the thermally grown oxide on the top surface using measurements on gated diodes and guarded capacitors.

Silicon‐on‐insulator by oxygen implantation with a stationary beam

1985 ◽  
Vol 46 (9) ◽  
pp. 862-864 ◽  
Author(s):  
A. Mogro‐Campero ◽  
R. P. Love ◽  
N. Lewis ◽  
E. L. Hall
Keyword(s):  
Silicon On Insulator ◽  
Oxygen Implantation

Reduced defect density in silicon‐on‐insulator structures formed by oxygen implantation in two steps

1989 ◽  
Vol 54 (6) ◽  
pp. 526-528 ◽  
Author(s):  
J. Margail ◽  
J. Stoemenos ◽  
C. Jaussaud ◽  
M. Bruel
Keyword(s):  
Defect Density ◽  
Silicon On Insulator ◽  
Oxygen Implantation

Layer Transfer of Hydrogen-Implanted Silicon Wafers by Thermal-Microwave Co-Activation

2006 ◽  
Vol 913 ◽  
Author(s):  
Y. Y. Yang ◽  
C. H. Huang ◽  
Y. -K. Hsu ◽  
S. -J. Jeng ◽  
C. -C. Tai ◽  
...  
Keyword(s):  
Thin Film ◽  
Low Temperature ◽  
Silicon On Insulator ◽  
Hydrogen Ions ◽  
Silicon Thin Film ◽  
Projected Range ◽  
Hydrogen Molecules ◽  
Bonded Interface ◽  
Hydrogen Implantation ◽  
Short Time

AbstractSilicon on insulator (SOI) substrate is a key materials for nano-scaling IC device and the requirement for its crystal structure and quality is really high. Nanothick silicon thin film can be transferred onto a handle wafer from a donation wafer to form a SOI wafer after this process including hydrogen implantation of donation wafer, wafer bonding, and thermal treatment at moderately high temperatures of 400 to 600 degree centigrade. The expansion of the hydrogen molecular evolving from the implanted hydrogen ions interacting with silicon dangling bonds and trapped inside the microcavities located near the ion projected range resulted in exfoliation of the silicon thin film in the final heating step. The hydrogen molecules inside the microcavities tend to expand along the bonded interface rather than radially to form individual blisters. Finally, the fracture failure of ion implanted area parallel to the bonded interface near the projected ion range is formed by the sideway expansion of the cavities due to the diffusion supply of implanted hydrogen excited by thermal energy. Microwave processing can lower the activity energy to speed the chemical reaction so that it leads the format of microcavities occurring at low temperature by directly exciting the implanted hydrogen ions by microwave energy and also results in decreasing the critical dosage for layer splitting. However, microwave irradiation alone at room temperature causes the formation of lots of nucleus sites of micro-voids filled by hydrogen molecule which is immobility in silicon resulting in the issue of uniformity of transferred layer. In this study, the hydrogen implanted silicon substrate was irradiated by microwave at low temperature (200 degree centigrade) rather than microwave alone to co-activate the implanted hydrogen ions in silicon to increase not only kinetic energy but also mobility to successfully achieve a completely transferred layer in a short time.

Dielectrically isolated silicon‐on‐insulator islands by masked oxygen implantation

1987 ◽  
Vol 51 (18) ◽  
pp. 1419-1421 ◽  
Author(s):  
J. R. Davis ◽  
A. Robinson ◽  
K. J. Reeson ◽  
P. L. F. Hemment
Keyword(s):  
Silicon On Insulator ◽  
Oxygen Implantation
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