Highly efficient vertical outgassing channels for low-temperature InP-to-silicon direct wafer bonding on the silicon-on-insulator substrate

2008 ◽  
Vol 26 (4) ◽  
pp. 1560 ◽  
Author(s):  
D. Liang ◽  
J. E. Bowers
Keyword(s):  
Low Temperature ◽  
Wafer Bonding ◽  
Silicon On Insulator ◽  
Highly Efficient ◽  
Direct Wafer Bonding ◽  
Insulator Substrate

High Precision Low Temperature Direct Wafer Bonding Technology for Wafer-Level 3D ICs Manufacturing

2016 ◽  
Vol 75 (9) ◽  
pp. 345-353 ◽  
Author(s):  
F. Kurz ◽  
T. Plach ◽  
J. Suss ◽  
T. Wagenleitner ◽  
D. Zinner ◽  
...  
Keyword(s):  
Low Temperature ◽  
High Precision ◽  
Wafer Bonding ◽  
Wafer Level ◽  
3D Ics ◽  
Direct Wafer Bonding ◽  
Bonding Technology

Low temperature GaAs/Si direct wafer bonding

2000 ◽  
Vol 36 (7) ◽  
pp. 677 ◽  
Author(s):  
M. Alexe ◽  
V. Dragoi ◽  
M. Reiche ◽  
U. Gösele
Keyword(s):  
Low Temperature ◽  
Wafer Bonding ◽  
Direct Wafer Bonding ◽  
Low Temperature Gaas

A Comparative Study for the Backside Illumination (BSI) Technology Using Bonding Wafer Cleaning Process for Advanced CMOS Image Sensor

2012 ◽  
Vol 195 ◽  
pp. 75-78
Author(s):  
Chung Kyung Jung ◽  
Sung Wook Joo ◽  
Seoung Hun Jeong ◽  
Sang Wook Ryu ◽  
Han Choon Lee ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Comparative Study ◽  
Quantum Efficiency ◽  
Wafer Bonding ◽  
Image Sensor ◽  
Silicon On Insulator ◽  
Cleaning Process ◽  
Electrochemical Systems ◽  
Wafer Cleaning ◽  
Direct Wafer Bonding

Over the last decades, the concept of backside illumination (BSI) sensors has become one of the leading solutions to optical challenges such as improved quantum efficiency (QE), and cross-talk, respectively [1-. Direct wafer bonding is a method for fabricating advanced substrates for micro-electrochemical systems (MEMS) and integrated circuits (IC). The most typical example of such an advanced substrate is the silicon-on-insulator (SOI) wafer.

Structural Evaluation of Silicon‐on‐Insulator Fabricated by a Direct Wafer Bonding and Numerically Controlled Polishing Technique

1991 ◽  
Vol 138 (8) ◽  
pp. 2468-2474 ◽  
Author(s):  
A. Yamada ◽  
Bai‐Lin Jiang ◽  
G. A. Rozgonyi ◽  
H. Shirotori ◽  
O. Okabayashi ◽  
...  
Keyword(s):  
Wafer Bonding ◽  
Silicon On Insulator ◽  
Structural Evaluation ◽  
Direct Wafer Bonding

Influence of the cavity on the low-temperature photoluminescence of SiGe∕Si multiquantum wells grown on a silicon-on-insulator substrate

2006 ◽  
Vol 88 (12) ◽  
pp. 121901 ◽  
Author(s):  
C. B. Li ◽  
B. W. Cheng ◽  
Y. H. Zuo ◽  
A. P. Morrison ◽  
J. Z. Yu ◽  
...  
Keyword(s):  
Low Temperature ◽  
Silicon On Insulator ◽  
Insulator Substrate ◽  
Low Temperature Photoluminescence
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