Electromigration in Pb-free flip chip solder joints on flexible substrates

2006 ◽  
Vol 99 (2) ◽  
pp. 023520 ◽  
Author(s):  
J. W. Nah ◽  
Fei Ren ◽  
K. N. Tu ◽  
Sridharan Venk ◽  
Gabe Camara
Keyword(s):  
Flip Chip ◽  
Solder Joints ◽  
Flexible Substrates

Strategies for Improving Reliability of Solder Joints on Power Semiconductor Devices

2003 ◽  
Author(s):  
Guo-Quan Lu ◽  
Xingsheng Liu ◽  
Sihua Wen ◽  
Jesus Noel Calata ◽  
John G. Bai
Keyword(s):  
Finite Element ◽  
Solder Joint ◽  
Thermal Cycling ◽  
Flip Chip ◽  
Solder Joints ◽  
Mechanical Stresses ◽  
Flexible Substrates ◽  
Solder Joint Reliability ◽  
Joint Reliability ◽  
Reliability Of Solder Joints

There has been a significant research effort on area-array flip-chip solder joint technology in order to reduce package footprint, enhance current handling capability, and improve heat dissipation. However, there is a lingering concern over cyclic fatigue of solder alloys by thermo-mechanical stresses arising from mismatched thermal expansion coefficients of expansion among the various components of the package. In this paper, some strategies taken to improve the reliability of solder joints on power devices in single-device and multi-chip packages are presented. A strategy for improving solder joint reliability by adjusting solder joint geometry, underfilling and utilization of flexible substrates is discussed with emphasis on triple-stacked solder joints that resemble the shape of an hourglass. The hourglass shape relocates the highest inelastic strain away from the weaker interface with the chip to the bulk region of the joint while the underfill provides a load transfer from the joints. Flexible substrates can deform to relieve thermo-mechanical stresses. Thermal cycling data show significant improvements in reliability when these techniques are used. The design, testing, and finite-element analyses of an interconnection structure, termed the Dimple-Array Interconnect (DAI), for improving the solder joint reliability is also presented. In the DAI structure, a solder is used to join arrays of dimples pre-formed on a metal sheet onto the bonding pads of a device. Finite-element thermo-mechanical analyses and thermal cycling data show that the dimple-array solder joints are more fatigue-resistant than the conventional barrel-shaped solder joints in flip-chip IC packages.

Rapid diagnosis of electromigration induced failure time of Pb-free flip chip solder joints by high resolution synchrotron radiation laminography

2011 ◽  
Vol 99 (8) ◽  
pp. 082114 ◽  
Author(s):  
Tian Tian ◽  
Feng Xu ◽  
Jung Kyu Han ◽  
Daechul Choi ◽  
Yin Cheng ◽  
...  
Keyword(s):  
High Resolution ◽  
Synchrotron Radiation ◽  
Flip Chip ◽  
Solder Joints ◽  
Failure Time ◽  
Rapid Diagnosis

Crack Propagation Experiments on Flip Chip Solder Joints

1998 ◽  
Vol 515 ◽  
Author(s):  
S. Wiese ◽  
F. Feustel ◽  
S. Rzepka ◽  
E. Meusel
Keyword(s):  
Crack Propagation ◽  
Flip Chip ◽  
Solder Joints ◽  
Shear Loading ◽  
Displacement Curve ◽  
In Situ Experiments ◽  
Propagation Experiment ◽  
Crack Propagation Experiment ◽  
Number Of Cycles ◽  
Force Displacement

ABSTRACTThe paper presents crack propagation experiments on real flip chip specimens applied to reversible shear loading. Two specially designed micro testers will be introduced. The first tester provides very precise measurements of the force displacement hysteresis. The achieved resolutions have been I mN for force and 20 nm for displacement. The second micro tester works similar to the first one, but is designed for in-situ experiments inside the SEM. Since it needs to be very small in size it reaches only resolutions of 10 mN and 100nm, which is sufficient to achieve equivalence to the first tester. A cyclic triangular strain wave is used as load profile for the crack propagation experiment. The experiment was done with both machines applying equivalent specimens and load. The force displacement curve was recorded using the first micro mechanical tester. From those hysteresis, the force amplitude has been determined for every cycle. All force amplitudes are plotted versus the number of cycles in order to quantify the crack length. With the second tester, images were taken at every 10th … 100th cycle in order to locate the crack propagation. Finally both results have been linked together for a combined quatitive and spatial description of the crack propagation in flip chip solder joints.

Effect of entropy production on microstructure change in eutectic SnPb flip chip solder joints by thermomigration

2006 ◽  
Vol 89 (22) ◽  
pp. 221906 ◽  
Author(s):  
Fan-Yi Ouyang ◽  
K. N. Tu ◽  
Yi-Shao Lai ◽  
Andriy M. Gusak
Keyword(s):  
Entropy Production ◽  
Flip Chip ◽  
Solder Joints ◽  
Microstructure Change ◽  
Eutectic Snpb

Study of void formation due to electromigration in flip-chip solder joints using Kelvin bump probes

2006 ◽  
Vol 89 (3) ◽  
pp. 032103 ◽  
Author(s):  
Y. W. Chang ◽  
S. W. Liang ◽  
Chih Chen
Keyword(s):  
Flip Chip ◽  
Solder Joints ◽  
Void Formation

Experimental Study of Void Formation in High-Lead Solder Joints of Flip-Chip Assemblies

2004 ◽  
Vol 127 (2) ◽  
pp. 120-126 ◽  
Author(s):  
Daijiao Wang ◽  
Ronald L. Panton
Keyword(s):  
Flip Chip ◽  
Solder Joints ◽  
Numerical Study ◽  
Void Formation ◽  
Middle Layer ◽  
Molten Solder ◽  
Previous Theory ◽  
Solder Interconnects ◽  
Heating Profiles ◽  
High Lead

Understanding the formation of voids in solder joints is important for predicting the long-term reliability of solder interconnects. This paper reports experimental research on the formation of void bubbles within molten solder bumps in flip-chip connections. For flip-chip-soldered electronic components, which have small solder volume, voids can be more detrimental to reliability. A previous theory based on thermocapillary flow reveals that the direction of heating influences void formation. Using different heating profiles, 480 solder joints of flip-chip assemblies were processed. A high-lead 90Pb∕8Sn∕2Ag solder was employed in the experiments. The solder samples were microsectioned to determine the actual size or diameter of the voids. A database on sizes and locations of voids was then constructed. More defective bumps, 80%, and higher void volume were found when the solder was melted from top (flip-chip side) to bottom (test board side). The observation on cases with melting direction from bottom to top had 40% defective bumps. The results show that a single big void is near the solder bump center with a few small voids near the edge. This supports the numerical study based on the thermocapillary theory. When the melting direction was reversed, many small voids appear near the edge. Big and middle-size voids tend to stay in the middle and outer regions from top towards middle layer of the bump. This experimental finding does not completely agree with the interpretation on the formation of voids by thermocapillary theory, however, the results do show that heat flux direction plays significant role in the formation and distribution of void bubbles in molten solder.

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