Transient enhanced diffusion without {311} defects in low energy B+‐implanted silicon

1995 ◽  
Vol 67 (14) ◽  
pp. 2025-2027 ◽  
Author(s):  
L. H. Zhang ◽  
K. S. Jones ◽  
P. H. Chi ◽  
D. S. Simons
Keyword(s):  
Low Energy ◽  
Enhanced Diffusion ◽  
Transient Enhanced Diffusion

Low Energy Implantation and Transient Enhanced Diffusion: Physical Mechanisms and Technology Implications

1997 ◽  
Vol 469 ◽  
Author(s):  
N. E. B. Cowern ◽  
E. J. H. Collart ◽  
J. Politiek ◽  
P. H. L. Bancken ◽  
J. G. M. Van Berkum ◽  
...  
Keyword(s):  
Thermal Activation ◽  
Crystalline Silicon ◽  
Cmos Technology ◽  
Low Energy ◽  
Defect Engineering ◽  
Enhanced Diffusion ◽  
Physical Mechanisms ◽  
Transient Enhanced Diffusion ◽  
Junction Formation ◽  
Silicon Cmos

ABSTRACTLow energy implantation is currently the most promising option for shallow junction formation in the next generations of silicon CMOS technology. Of the dopants that have to be implanted, boron is the most problematic because of its low stopping power (large penetration depth) and its tendency to undergo transient enhanced diffusion and clustering during thermal activation. This paper reports recent advances in our understanding of low energy B implants in crystalline silicon. In general, satisfactory source-drain junction depths and sheet resistances are achievable down to 0.18 micron CMOS technology without the need for implantation of molecular species such as BF2. With the help of defect engineering it may be possible to reach smaller device dimensions. However, there are some major surprises in the physical mechanisms involved in implant profile formation, transient enhanced diffusion and electrical activation of these implants, which may influence further progress with this technology. Some initial attempts to understand and model these effects will be described.

Transient enhanced diffusion and defect microstructure in high dose, low energy As+ implanted Si

1998 ◽  
Vol 84 (11) ◽  
pp. 5997-6002 ◽  
Author(s):  
V. Krishnamoorthy ◽  
K. Moller ◽  
K. S. Jones ◽  
D. Venables ◽  
J. Jackson ◽  
...  
Keyword(s):  
Low Energy ◽  
High Dose ◽  
Enhanced Diffusion ◽  
Transient Enhanced Diffusion ◽  
Defect Microstructure

Reduction of boron transient enhanced diffusion in silicon by low-energy cluster ion implantation

1998 ◽  
Vol 54 (1-3) ◽  
pp. 80-83 ◽  
Author(s):  
Norihiro Shimada ◽  
Takaaki Aoki ◽  
Jiro Matsuo ◽  
Isao Yamada ◽  
Kenichi Goto ◽  
...  
Keyword(s):  
Ion Implantation ◽  
Low Energy ◽  
Enhanced Diffusion ◽  
Transient Enhanced Diffusion ◽  
Cluster Ion ◽  
Energy Cluster

The Source of Transient Enhanced Diffusion in Sub-keV Implanted Boron in Crystalline Silicon

2000 ◽  
Vol 610 ◽  
Author(s):  
E. Napolitani ◽  
A. Carnera ◽  
V. Privitera ◽  
E. Schroer ◽  
G. Mannino ◽  
...  
Keyword(s):  
Surface Layer ◽  
Annealing Temperature ◽  
Crystalline Silicon ◽  
Point Of View ◽  
Low Energy ◽  
Implantation Energy ◽  
Enhanced Diffusion ◽  
Decay Constants ◽  
Transient Enhanced Diffusion ◽  
Activation Annealing

AbstractThe transient enhanced diffusion (TED) during activation annealing of ultra low energy implanted boron (0.5 keV & 1 keV, 1×1013/cm2 & 1×1014/cm2) in silicon is investigated in detail. Annealing in the temperature range from 450°C to 750°C is either performed directly after implantation or after the removal of a surface layer before annealing. The kinetics revealed two regimes of enhanced diffusion ruled by different decay constants and different activation energies. The dependence of these two processes on implantation energy and annealing temperature is described and explained from the microscopical point of view. The annealings performed after surface layer removal, revealed that the defects responsible for the faster diffusion are located deeper than the defects responsible for the slower process.

Transient Enhanced Diffusion for Ultra Low Energy Boron, Phosphorus, and Arsenic Implantation in Silicon

1998 ◽  
Vol 532 ◽  
Author(s):  
Ning Yu ◽  
Amitabh Jain ◽  
Doug Mercer
Keyword(s):  
Ion Implantation ◽  
Process Development ◽  
Cmos Technology ◽  
Low Energy ◽  
Defect Engineering ◽  
Enhanced Diffusion ◽  
Transient Enhanced Diffusion ◽  
Ultra Shallow Junctions ◽  
Technology Nodes ◽  
The Impact

ABSTRACTThe SIA roadmap predicts that junction depths of 500 angstroms are required for CMOS technology nodes of 0.18 μm or beyond by the year 2001. There are several ultra-shallow junction doping techniques currently under investigation. These include beamline ion implantation, plasma immersion ion implantation, and gas immersion laser doping. This study was based on beamline ion implantation of B, P, and As into single-crystal Si wafers at 0.25-2 keV to doses of (2- 10)×1014 at./cm2 with minimized beam energy contamination. Rapid thermal annealing was applied to the implanted wafers at 1000-1050 °C for 10-15 sec at ramp rates of 35- 50 °C/s in a N2 ambient. Transient enhanced diffusion was observed for all three implant species. For example, the depth of 0.25 keV B measured by SIMS increases from 250 to 520 A at a concentration level of l×1017 at./cm3 upon RTA. To minimize the TED, several schemes of defect engineering were applied prior to low energy implantation, including pre-amorphization and implantation of other species. A comparison of TED for different implantation conditions is given with the aim of process development for minimizing TED. The impact of energy contamination on ultra shallow junctions is also addressed.

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