A Survey Describing Beyond Si Transistors and Exploring Their Implications for Future Processors

The advancement of Silicon CMOS technology has led information technology innovation for decades. However, scaling transistors down according to Moore’s law is almost reaching its limitations. To improve system performance, cost, and energy efficiency, vertical-optimization in multiple layers of the computing stack is required. Technological awareness in terms of devices and circuits could enable informed system-level decisions. For example, graphene is a promising material for extremely scaled high-speed transistors because of its remarkably high mobility, but it can not be used in integrated circuits as a result of the high leakage current from its zero bandgap. In this article, we discuss the fundamental physics of transistors and their ramifications on system design to assist device-level technology consideration during system design. Additionally, various emerging devices and their utilization on a vertically-optimized computing stack are introduced. This article serves as a survey of emerging device technologies that may be relevant in these areas, with an emphasis on making the descriptions approachable by system and software designers to understand the potential solutions. A basic vocabulary will be built to understand how to digest technical content, followed by a survey of devices, and finally a discussion of the implications for future processing systems.

Investigating physical model interface in the TCAD Sentaurus environment

Currently, the application SDevice software package TCAD Sentaurus is a reliable tool for electrophysical simulation of silicon CMOS transistors operating in the temperature range of -60 °C – +125 °C. To adapt the modeling process to specific physical conditions of the devices, application SDevice has an extensive library of models of electrophysical parameters, in particular models of mobility or band gap energy. However, when the device operates under extreme cryogenic conditions, there is a need to rework these models using a special Physical Model Interface (PMI). The paper presents methodological features of work with PMI and results of implementation of custom parameter models for silicon devices.