Facile Five-Step Heteroepitaxial Growth of GaAs Nanowires on Silicon Substrates and the Twin Formation Mechanism

ACS Nano ◽  
2016 ◽  
Vol 10 (2) ◽  
pp. 2424-2435 ◽  
Author(s):  
Maoqing Yao ◽  
Chunyang Sheng ◽  
Mingyuan Ge ◽  
Chun-Yung Chi ◽  
Sen Cong ◽  
...  
1989 ◽  
Vol 148 ◽  
Author(s):  
Thomas George ◽  
E. R. Weber ◽  
A.T. Wu ◽  
S. Nozaki ◽  
N. Noto ◽  
...  

ABSTRACTHeteroepitaxial growth of GaAs on Silicon substrates is being actively pursued, since this technology offers numerous potential benefits in terms of optoelectronic and high speed devices. However a complete understanding of the fundamental causes for film properties such as surface morphology and crystal quality is still lacking at the present time. We present here the results of a study of GaAs grown on Silicon substrates using AlxGa1−xP intermediate layers. This system offers the advantage of studying the effects of surface properties and bulk properties of heteroepitaxial films separately. Surface and interface properties are shown to be the dominant factors in the growth of AlxGa1−xP on Si, where the lattice match between the two materials is very good. For low Al mole fractions the layers tend to form islands indicative of 3D growth, whereas for x>0.4, the layers are planar indicative of 2D growth. Bulk properties such as the lattice constant mismatch are presumed to play a key role in the growth of GaAs on AlxGa1−xP intermediate layers, where it is shown that the GaAs still has an island type nucleation phase, even though surface and interface factors such as contamination and polar-on-nonpolar growth are avoided. In addition the nucleation of the GaAs on the AlxGa1−xP intermediate layers appears to be modified by the nature of the AlxGa1−xP layer i.e. whether the intermediate layer is in the form of islands or a planar layer. The final surface morphology and the crystalline quality of 3gtm GaAs films grown on AlxGa1−xP intermediate layers can be correlated to the initial nucleation.


2014 ◽  
Vol 1663 ◽  
Author(s):  
Chuan Du ◽  
Jiadao Wang ◽  
Darong Chen

ABSTRACTA facile and novel method of fabricating large-area-patterned monolayer of polytetrafluoroethylene(PTFE) nanoparticles was achieved using surface charge induced colloidal deposition. Chemical processes of amination and hydroxylation were used to make the silicon substrates positively and negatively charged, respectively, while the PTFE colloidal nanoparticles were anisotropic and negatively charged. After colloidal deposition, an ordered monolayer with microholes was formed on the amination surface, while an island-like monolayer was achieved on the hydroxylation surface. Both of the two kinds of monolayers were as large as 1.5 square centimeters. It is worth pointing out that these large-area-patterned monolayers were fabricated without any templates and the whole process only took several hours. The formation mechanism of the different structures can be generally attributed to the cooperation and competition of three-body, two-body and particle-wall interactions. It is believed that the interesting patterned monolayer formation mechanism, high production efficiency, good adaptability and quality will make this novel method attractive.


1989 ◽  
Vol 4 (4) ◽  
pp. 834-842 ◽  
Author(s):  
F. Ernst ◽  
P. Pirouz

Films of three compound semiconductors with the zincblende structure grown epitaxially on {100} silicon substrates by chemical vapor deposition or metal-organic chemical vapor deposition were investigated by transmission electron microscopy. The three systems have similar thermal mismatches but cover a wide range of lattice mismatch. From the comparison of the observed microstructures as well as from the investigation of early stages of film formation it is concluded that the lattice mismatch plays a minor role in the formation of stacking faults and twin boundaries. A formation mechanism is proposed for these defects which is based on deposition errors during the adsorption of atoms on {111} facets of film nuclei. The observed microstructural features are discussed in terms of this model.


Nano Letters ◽  
2008 ◽  
Vol 8 (11) ◽  
pp. 3755-3760 ◽  
Author(s):  
Xin-Yu Bao ◽  
Cesare Soci ◽  
Darija Susac ◽  
Jon Bratvold ◽  
David P. R. Aplin ◽  
...  

Coatings ◽  
2021 ◽  
Vol 11 (8) ◽  
pp. 945
Author(s):  
Avtandil Tavkhelidze ◽  
Larissa Jangidze ◽  
Zaza Taliashvili ◽  
Nima E. Gorji

Geometry-induced doping (G-doping) has been realized in semiconductors nanograting layers. G-doping-based p-p(v) junction has been fabricated and demonstrated with extremely low forward voltage and reduced reverse current. The formation mechanism of p-p(v) junction has been proposed. To obtain G-doping, the surfaces of p-type and p+-type silicon substrates were patterned with nanograting indents of depth d = 30 nm. The Ti/Ag contacts were deposited on top of G-doped layers to form metal-semiconductor junctions. The two-probe method has been used to record the I–V characteristics and the four-probe method has been deployed to exclude the contribution of metal-semiconductor interface. The collected data show a considerably lower reverse current in p-type substrates with nanograting pattern. In the case of p+-type substrate, nanograting reduced the reverse current dramatically (by 1–2 orders of magnitude). However, the forward currents are not affected in both substrates. We explained these unusual I–V characteristics with G-doping theory and p-p(v) junction formation mechanism. The decrease of reverse current is explained by the drop of carrier generation rate which resulted from reduced density of quantum states within the G-doped region. Analysis of energy-band diagrams suggested that the magnitude of reverse current reduction depends on the relationship between G-doping depth and depletion width.


1995 ◽  
Vol 379 ◽  
Author(s):  
Christos Papavassiliou ◽  
G. Constantinidis ◽  
N. Kornilios ◽  
A. Georgakilas ◽  
E. LÖchterman ◽  
...  

ABSTRACTA systematic experimental investigation has been undertaken for the optimization of the wafer parameters and processing for silicon wafers intended for use as substrates for MBE growth, with emphasis on heteroepitaxial growth of GaAs-on- Si. Within this investigation, results are presented of an initial study focused on the optimization of the magnitude of the misorientation angle towards a <110> direction for the growth of GaAs on (001) Si wafers. This angle controls the structure of the stepped (001)Si surface and can influence the defect density and surface smoothness of the GaAs-on-Si layers. Silicon substrates misoriented from 0 deg. up to 9 deg. were cut to specification and subsequently used for the epitaxial growth of GaAs MESFET structures. MESFETs were fabricated and their dc and RF characteristics compared. The resistivity of the GaAs-on-Si buffer layers was evaluated and correlated to the results from device characterization. This work presents the effects of the magnitude of the angle of misorientation in the range from 0 to 9 deg.


2001 ◽  
Vol 680 ◽  
Author(s):  
Yoshihiro Irokawa ◽  
Noboru Yamada ◽  
Masahito Kodama ◽  
Tetsu Kachi

ABSTRACTSilicon (Si) substrates having cavities just beneath the surface layer (multi-cavity Si substrates) were examined whether they worked as the stress relaxation structure in 3C-SiC heteroepitaxial growth on Si. Single crystalline 3C-SiC layers were grown on the multi-cavity Si substrates by means of low pressure chemical vapor deposition (LPCVD). The layers' quality was characterized by the cross-sectional TEM observations and the Micro-Raman spectroscopy. The TEM results showed that this structure reduced the defect density in the 3C-SiC layers. The averaged full width at half-maximum (FWHM) of LO Raman mode in the 3C-SiC layerson the multi-cavity Si substrates became narrower than that on the conventional Si substrates. Furthermore, Schottky barrier structures showed that the reverse leakage current of the diodes using the multi-cavity Si substrates is smaller than that using the conventional Si substrates. These results indicate that the multi-cavity Si substrates are effective for stress relaxation in the 3C-SiC layers.


2006 ◽  
Vol 287 (1) ◽  
pp. 112-117 ◽  
Author(s):  
F.O. Lucas ◽  
L. O’Reilly ◽  
G. Natarajan ◽  
P.J. McNally ◽  
S. Daniels ◽  
...  

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