Chemically Tunable Organic Dielectric Layer on an Oxide TFT: Poly(p-xylylene) Derivatives

Author(s):  
Jaehyun Kim ◽  
Seong Cheol Jang ◽  
Kihyeon Bae ◽  
Jimin Park ◽  
Hyoung-Do Kim ◽  
...  
2015 ◽  
Author(s):  
Fara Naila Rusnan ◽  
Khairul Anuar Mohamad ◽  
Dzul Fahmi Mohd Husin Seria ◽  
Ismail Saad ◽  
Bablu K. Ghosh ◽  
...  

2016 ◽  
Vol 6 (1) ◽  
Author(s):  
Yogeenth Kumaresan ◽  
Yusin Pak ◽  
Namsoo Lim ◽  
Yonghun kim ◽  
Min-Ji Park ◽  
...  

2020 ◽  
Vol 2020 ◽  
pp. 1-8
Author(s):  
Hwa-Sun Park ◽  
Young-Il Na ◽  
Sang-Min Lee ◽  
Su-Jeong Suh ◽  
Yong-Soo Oh ◽  
...  

We introduce a horizontal array capacitor with nine capacitances in a single body using an organic dielectric layer impregnated with glass fiber as a prepreg sheet. An organic solid horizontal array capacitor with a dielectric of prepreg materials of the epoxy type can implement the nine capacitances in a single body via a unique simple lamination and cutting process. We then investigate the basic electrical properties of a horizontal array capacitor. The organic solid array capacitors with five electrodes and four dielectrics are Cu/PPG layer/Cu/PPG layer/Cu/PPG layer/Cu/PPG layer/Cu with a horizontal array structure. The size of a completed array capacitor is 2.85 × 2.85 mm. The height of the fabricated array capacitor in the vertical direction is 0.5 mm, with nine capacitances possessing a series-type structure. The average capacitance value of C1, C2, C3, and C4 is 1.98 nF, and each tolerance has a value within 1% based on the average value. The temperature change rate in the capacitance maintains a nearly linear characteristic, but the rate of change tends to increase finely from 120°C or more. The capacitance values of C5, C6, and C7 with the parallel circuit were measured according to the voltage. Impedance and ESR (equivalent series resistor) of C1 were measured according to frequency and temperature.


2003 ◽  
Vol 766 ◽  
Author(s):  
Ahila Krishnamoorthy ◽  
N.Y. Huang ◽  
Shu-Yunn Chong

AbstractBlack DiamondTM. (BD) is one of the primary candidates for use in copper-low k integration. Although BD is SiO2 based, it is vastly different from oxide in terms of dielectric strength and reliability. One of the main reliability concerns is the drift of copper ions under electric field to the surrounding dielectric layer and this is evaluated by voltage ramp (V-ramp) and time dependent dielectric breakdown (TDDB). Metal 1 and Metal 2 intralevel comb structures with different metal widths and spaces were chosen for dielectric breakdown studies. Breakdown field of individual test structures were obtained from V-ramp tests in the temperature range of 30 to 150°C. TDDB was performed in the field range 0.5 – 2 MV/cm. From the leakage between combs at the same level (either metal 1 or metal 2) Cu drift through SiC/BD or SiN/BD interface was characterized. It was found that Cu/barrier and barrier/low k interfaces functioned as easy paths for copper drift thereby shorting the lines. Cu/SiC was found to provide a better interface than Cu/SiN.


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