Corrigendum to “Novel low-cost alkaline texturing process for diamond-wire-sawn industrial monocrystalline silicon wafers” [Sol. Energy Mater. Sol. Cells 185 (2018) 406–414]

2019 ◽  
Vol 189 ◽  
pp. 263
Author(s):  
Prabir Kanti Basu ◽  
Sreejith KP ◽  
Tarun S. Yadav ◽  
Anil Kottantharayil ◽  
Ashok Kumar Sharma
Keyword(s):  
Low Cost ◽  
Silicon Wafers ◽  
Monocrystalline Silicon ◽  
Diamond Wire ◽  
Energy Mater

Novel low-cost alkaline texturing process for diamond-wire-sawn industrial monocrystalline silicon wafers

2018 ◽  
Vol 185 ◽  
pp. 406-414 ◽  
Author(s):  
Prabir Kanti Basu ◽  
KP Sreejith ◽  
Tarun S. Yadav ◽  
Anil Kottanthariyil ◽  
Ashok Kumar Sharma
Keyword(s):  
Low Cost ◽  
Silicon Wafers ◽  
Monocrystalline Silicon ◽  
Diamond Wire

The impact of damage etching on fracture strength of diamond wire sawn monocrystalline silicon wafers for photovoltaics use

2018 ◽  
Vol 57 (12) ◽  
pp. 126501 ◽  
Author(s):  
Halubai Sekhar ◽  
Tetsuo Fukuda ◽  
Yasuhiro Kida ◽  
Katsuto Tanahashi ◽  
Hidetaka Takato
Keyword(s):  
Fracture Strength ◽  
Silicon Wafers ◽  
Monocrystalline Silicon ◽  
Diamond Wire ◽  
The Impact

The impact of subsurface damage on the fracture strength of diamond-wire-sawn monocrystalline silicon wafers

2018 ◽  
Vol 57 (8S3) ◽  
pp. 08RB08 ◽  
Author(s):  
Halubai Sekhar ◽  
Tetsuo Fukuda ◽  
Katsuto Tanahashi ◽  
Katsuhiko Shirasawa ◽  
Hidetaka Takato ◽  
...  
Keyword(s):  
Fracture Strength ◽  
Subsurface Damage ◽  
Silicon Wafers ◽  
Monocrystalline Silicon ◽  
Diamond Wire ◽  
The Impact

scholarly journals The Influence of Wire Speed on Phase Transitions and Residual Stress in Single Crystal Silicon Wafers Sawn by Resin Bonded Diamond Wire Saw

Micromachines ◽  
2021 ◽  
Vol 12 (4) ◽  
pp. 429
Author(s):  
Tengyun Liu ◽  
Peiqi Ge ◽  
Wenbo Bi
Keyword(s):  
Residual Stress ◽  
Surface Layer ◽  
Phase Transitions ◽  
Single Crystal ◽  
Amorphous Silicon ◽  
Silicon Wafer ◽  
Single Crystal Silicon ◽  
Silicon Wafers ◽  
Crystal Silicon ◽  
Diamond Wire

Lower warp is required for the single crystal silicon wafers sawn by a fixed diamond wire saw with the thinness of a silicon wafer. The residual stress in the surface layer of the silicon wafer is the primary reason for warp, which is generated by the phase transitions, elastic-plastic deformation, and non-uniform distribution of thermal energy during wire sawing. In this paper, an experiment of multi-wire sawing single crystal silicon is carried out, and the Raman spectra technique is used to detect the phase transitions and residual stress in the surface layer of the silicon wafers. Three different wire speeds are used to study the effect of wire speed on phase transition and residual stress of the silicon wafers. The experimental results indicate that amorphous silicon is generated during resin bonded diamond wire sawing, of which the Raman peaks are at 178.9 cm−1 and 468.5 cm−1. The ratio of the amorphous silicon surface area and the surface area of a single crystal silicon, and the depth of amorphous silicon layer increases with the increasing of wire speed. This indicates that more amorphous silicon is generated. There is both compressive stress and tensile stress on the surface layer of the silicon wafer. The residual tensile stress is between 0 and 200 MPa, and the compressive stress is between 0 and 300 MPa for the experimental results of this paper. Moreover, the residual stress increases with the increase of wire speed, indicating more amorphous silicon generated as well.

Experimental investigation into polishing of monocrystalline silicon wafer using double-disc chemical assisted magnetorheological finishing process

2021 ◽  
pp. 095440622098384
Author(s):  
Mayank Srivastava ◽  
Pulak M Pandey
Keyword(s):  
Surface Roughness ◽  
Silicon Wafer ◽  
Flow Rate ◽  
Silicon Wafers ◽  
Monocrystalline Silicon ◽  
Slurry Flow ◽  
Magnetorheological Finishing ◽  
Finishing Process ◽  
Process Factors ◽  
Slurry Flow Rate

In the present work, a novel hybrid finishing process that combines the two preferred methods in industries, namely, chemical-mechanical polishing (CMP) and magneto-rheological finishing (MRF), has been used to polish monocrystalline silicon wafers. The experiments were carried out on an indigenously developed double-disc chemical assisted magnetorheological finishing (DDCAMRF) experimental setup. The central composite design (CCD) was used to plan the experiments in order to estimate the effect of various process factors, namely polishing speed, slurry flow rate, percentage CIP concentration, and working gap on the surface roughness ([Formula: see text]) by DDCAMRF process. The analysis of variance was carried out to determine and analyze the contribution of significant factors affecting the surface roughness of polished silicon wafer. The statistical investigation revealed that percentage CIP concentration with a contribution of 30.6% has the maximum influence on the process performance followed by working gap (21.4%), slurry flow rate (14.4%), and polishing speed (1.65%). The surface roughness of polished silicon wafers was measured by the 3 D optical profilometer. Scanning electron microscopy (SEM) and atomic force microscopy (AFM) were carried out to understand the surface morphology of polished silicon wafer. It was found that the surface roughness of silicon wafer improved with the increase in polishing speed and slurry flow rate, whereas it was deteriorated with the increase in percentage CIP concentration and working gap.

scholarly journals Flexible Batteries: Flexible Na/K‐Ion Full Batteries from the Renewable Cotton Cloth–Derived Stable, Low‐Cost, and Binder‐Free Anode and Cathode (Adv. Energy Mater. 38/2019)

2019 ◽  
Vol 9 (38) ◽  
pp. 1970149 ◽  
Author(s):  
Jin‐Zhi Guo ◽  
Zhen‐Yi Gu ◽  
Xin‐Xin Zhao ◽  
Mei‐Yi Wang ◽  
Xu Yang ◽  
...  
Keyword(s):  
Low Cost ◽  
Cotton Cloth ◽  
Binder Free ◽  
Energy Mater

Demonstration of low cost TSV fabrication in thick silicon wafers

2014 ◽  
Author(s):  
E. Vick ◽  
D. S. Temple ◽  
R. Anderson ◽  
J. Lannon ◽  
C. Li ◽  
...  
Keyword(s):  
Low Cost ◽  
Silicon Wafers
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