A current-mode tunable low-supply-voltage ring oscillator

2010 ◽  
Vol 20 (6) ◽  
pp. 637-641
Author(s):  
Minglin Ma ◽  
Chunhua Wang
Keyword(s):  
Supply Voltage ◽  
Current Mode ◽  
Ring Oscillator ◽  
Low Supply Voltage ◽  
A Current

scholarly journals Analog Multiplier Based on Squarer Cells

2019 ◽  
pp. 350-354
Author(s):  
Reza Zarei ◽  
Moora Maali
Keyword(s):  
Supply Voltage ◽  
Current Mode ◽  
Low Power Consumption ◽  
Analog Multiplier ◽  
Body Effect ◽  
Weak Inversion ◽  
Inversion Region ◽  
Input Range ◽  
Low Supply Voltage ◽  
A Current

In this paper, a current-mode analog multiplier circuit is proposed that utilizes MOS translinear principle. The parameters of TSMC 0.18µm technology are used to design the proposed multiplier that employs CMOS transistors operating in weak inversion region. Simulations are performed by HSPICE for the circuit to prove its great merits of; low power consumption (100µW), low supply voltage (1.6V), body effect immunity, wide input range (±100nA), bandwidth of 1 MHz, and THD of 4%.

scholarly journals Design of area-efficient GHz range current mode frequency synthesizer using standard CMOS technology

2019 ◽  
Vol 70 (4) ◽  
pp. 323-328
Author(s):  
Dan-Dan Zheng ◽  
Yu-Bin Li ◽  
Chang-Qi Wang ◽  
Kai Huang ◽  
Xiao-Peng Yu
Keyword(s):  
Frequency Synthesizer ◽  
Frequency Tuning ◽  
Supply Voltage ◽  
Current Mode ◽  
Cmos Technology ◽  
Mode Frequency ◽  
Loop Filter ◽  
Silicon Area ◽  
Power Efficient ◽  
A Current

Abstract In this paper, an area and power efficient current mode frequency synthesizer for system-on-chip (SoC) is proposed. A current-mode transformer loop filter suitable for low supply voltage is implemented to remove the need of a large capacitor in the loop filter, and a current controlled oscillator with additional voltage based frequency tuning mechanism is designed with an active inductor. The proposed design is further integrated with a fully programmable frequency divider to maintain a good balance among output frequency operating range, power consumption as well as silicon area. A test chip is implemented in a standard 0.13 µm CMOS technology, measurement result demonstrates that the proposed design has a working range from 916 MHz to 1.1 l GHz and occupies a silicon area of 0.25 mm2 while consuming 8.4 mW from a 1.2 V supply.

scholarly journals 1.5-V CMOS Current Multiplier/Divider

2018 ◽  
Vol 8 (3) ◽  
pp. 1478 ◽  
Author(s):  
Jetsdaporn Satansup ◽  
Worapong Tangsrirat
Keyword(s):  
Low Voltage ◽  
Supply Voltage ◽  
Current Mode ◽  
Cmos Technology ◽  
Signal Frequency ◽  
Total Power ◽  
Total Power Consumption ◽  
Linearity Error ◽  
Low Supply Voltage ◽  
Circuit Technique

A circuit technique for designing a compact low-voltage current-mode multiplier/divider circuit in CMOS technology is presented.  It is based on the use of a compact current quadratic cell able to operate at low supply voltage.  The proposed circuit is designed and simulated for implementing in TSMC 0.25-m CMOS technology with a single supply voltage of 1.5 V.  Simulation results using PSPICE, accurately agreement with theoretical ones, have been provided, and also demonstrate a maximum linearity error of 1.5%, a THD less than 2% at 100 MHz, a total power consumption of 508 W, and -3dB small-signal frequency of about 245 MHz.

scholarly journals Analysis and Comparison of Rad-Hard Ring and LC-Tank Controlled Oscillators in 65 nm for SpaceFibre Applications

Sensors ◽  
2020 ◽  
Vol 20 (16) ◽  
pp. 4612 ◽  
Author(s):  
Danilo Monda ◽  
Gabriele Ciarpi ◽  
Sergio Saponara
Keyword(s):  
Supply Voltage ◽  
Process Variations ◽  
Current Mode ◽  
Cmos Technology ◽  
Operating Conditions ◽  
Ring Oscillator ◽  
Space Applications ◽  
Technology Scaling ◽  
Voltage Controlled Oscillators ◽  
Lc Tank

This work presented a comparison between two Voltage Controlled Oscillators (VCOs) designed in 65 nm CMOS technology. The first architecture based on a Ring Oscillator (RO) was designed using three Current Mode Logic (CML) stages connected in a loop, while the second one was based on an LC-tank resonator. This analysis aimed to choose a VCO architecture able to be integrated into a rad-hard Phase Locked Loop. It had to meet the requirements of the SpaceFibre protocol, which supports frequencies up to 6.25 GHz, for space applications. The full custom schematic and layout designs are shown, and Single Event Effect simulations results, performed with a double exponential current pulses generator, are presented in detail for both VCOs. Although the RO-VCO performances in terms of technology scaling and high-integration density were attractive, the simulations on the process variations demonstrated its inability to generate the target frequency in harsh operating conditions. Instead, the LC-VCO highlighted a lower influence through Process-Voltage-Temperature simulations on the oscillation frequency. Both architectures were biased with a supply voltage of 1.2 V. The achieved results for the second architecture analyzed were attractive to address the requirements of the new SpaceFibre aerospace standard.

An Ultra-Low-Voltage Low-Power Current-Mode True RMS-to-DC Converter

2016 ◽  
Vol 25 (06) ◽  
pp. 1650066 ◽  
Author(s):  
Pantre Kompitaya ◽  
Khanittha Kaewdang
Keyword(s):  
Integrated Circuits ◽  
Low Power ◽  
High Performance ◽  
Dynamic Range ◽  
Low Voltage ◽  
Supply Voltage ◽  
Circuit Complexity ◽  
Current Mode ◽  
Cmos Technology ◽  
Low Supply Voltage

A current-mode CMOS true RMS-to-DC (RMS: root-mean-square) converter with very low voltage and low power is proposed in this paper. The design techniques are based on the implicit computation and translinear principle by using CMOS transistors that operate in the weak inversion region. The circuit can operate for two-quadrant input current with wide input dynamic range (0.4–500[Formula: see text]nA) with an error of less than 1%. Furthermore, its features are very low supply voltage (0.8[Formula: see text]V), very low power consumption ([Formula: see text]0.2[Formula: see text]nW) and low circuit complexity that is suitable for integrated circuits (ICs). The proposed circuit is designed using standard 0.18[Formula: see text][Formula: see text]m CMOS technology and the HSPICE simulation results show the high performance of the circuit and confirm the validity of the proposed design technique.

scholarly journals A CURRENT-MODE RMS-TO-DC CONVERTER BASED ON TRANSLINEAR PRINCIPLE

2015 ◽  
pp. 171-174
Author(s):  
MOHAMMAD HADI DANESH ◽  
SASAN NIKSERESHT ◽  
MAHYAR DEHDAST
Keyword(s):  
Low Power ◽  
High Performance ◽  
Supply Voltage ◽  
Circuit Complexity ◽  
Current Mode ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Low Pass ◽  
Input Range ◽  
Low Supply Voltage

In this paper a low-power current-mode RMS-to-DC converter is proposed. The proposed converter includes absolute value circuit, squarer/divider circuit, low-pass filter and square root circuit which employ CMOS transistors operating in weak inversion region. The RMS-to-DC converter has low power consumption (<1μW), low supply voltage (0.9V), wide input range (from 50 nA to 500 nA), low relative error (<3 %), and low circuit complexity. Comparing the proposed circuit with two other current-mode circuits shows that the former outperforms the latters in terms of power dissipation, supply voltage, and complexity. Simulation results by HSPICE show high performance of the circuit and confirm the validity of the proposed design technique.

scholarly journals A CMOS CURRENT-MODE LOW POWER RMS-TO-DC CONVERTER

2015 ◽  
pp. 210-214
Author(s):  
MOHAMMAD HADI DANESH ◽  
MAHYAR DEHDAST ◽  
ABDOLGHANI AREKHI ◽  
AMIN EMAMI FARD
Keyword(s):  
Low Power ◽  
High Performance ◽  
Supply Voltage ◽  
Circuit Complexity ◽  
Current Mode ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Low Pass ◽  
Input Range ◽  
Low Supply Voltage

In this paper a low-power current-mode RMS-to-DC converter is proposed. The converter includes two-quadrant squarer/divider and the first-order low-pass filter cell, both of them use MOS translinear loops. The RMS-to-DC converter has low power consumption (< 0.75μW), low supply voltage (0.8 V), wide input range (from 40 nA to 500 nA), low relative error (< 3 %), and low circuit complexity. Comparing the proposed circuit with two other current-mode circuits shows that the former outperforms the latters in terms of power dissipation, supply voltage, and complexity. Simulation results by HSPICE show high performance of the circuit and confirm the validity of the proposed design technique.

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