Nano-CMOS and Post-CMOS Electronics: Circuits and Design
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Published By Institution Of Engineering And Technology

9781849199995, 9781785610004

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Thermal effects in carbon nanotube VLSI interconnects

Nano-CMOS and Post-CMOS Electronics: Circuits and Design ◽

10.1049/pbcs030e_ch6 ◽

2016 ◽

pp. 172-200

Author(s):

Srivastava ◽

Mohsin

Keyword(s):

Carbon Nanotube ◽

Thermal Effects ◽

Vlsi Interconnects

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A new paradigm towards performance centric computation beyond CMOS: DNA computing

Nano-CMOS and Post-CMOS Electronics: Circuits and Design ◽

10.1049/pbcs030e_ch12 ◽

2016 ◽

pp. 379-408

Author(s):

Ghosal ◽

Chatterjee ◽

Sarkar

Keyword(s):

Dna Computing ◽

New Paradigm ◽

Beyond Cmos

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High-level synthesis of digital integrated circuits in the nanoscale mobile electronics era

Nano-CMOS and Post-CMOS Electronics: Circuits and Design ◽

10.1049/pbcs030e_ch8 ◽

2016 ◽

pp. 219-265 ◽

Cited By ~ 1

Author(s):

Sengupta ◽

Mohanty

Keyword(s):

Integrated Circuits ◽

High Level Synthesis ◽

Digital Integrated Circuits ◽

High Level

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Low-leakage techniques for nanoscale CMOS circuits

Nano-CMOS and Post-CMOS Electronics: Circuits and Design ◽

10.1049/pbcs030e_ch5 ◽

2016 ◽

pp. 141-171

Author(s):

Pattanaik ◽

Sharma

Keyword(s):

Cmos Circuits ◽

Nanoscale Cmos ◽

Low Leakage

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Lumped electro-thermal modeling and analysis of carbon nanotube interconnects

Nano-CMOS and Post-CMOS Electronics: Circuits and Design ◽

10.1049/pbcs030e_ch7 ◽

2016 ◽

pp. 201-218 ◽

Cited By ~ 1

Author(s):

Todri-Sanial

Keyword(s):

Carbon Nanotube ◽

Thermal Modeling ◽

Modeling And Analysis

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Data stability and write ability enhancement techniques for FinFET SRAM circuits

Nano-CMOS and Post-CMOS Electronics: Circuits and Design ◽

10.1049/pbcs030e_ch4 ◽

2016 ◽

pp. 113-140

Author(s):

Salahuddin ◽

Kursun

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Nanoscale FinFET devices for PVT-aware SRAM

Nano-CMOS and Post-CMOS Electronics: Circuits and Design ◽

10.1049/pbcs030e_ch3 ◽

2016 ◽

pp. 71-111

Author(s):

Sharma ◽

Yadav ◽

Pattanaik

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On-chip gate delay variability measurement in scaled technology node

Nano-CMOS and Post-CMOS Electronics: Circuits and Design ◽

10.1049/pbcs030e_ch2 ◽

2016 ◽

pp. 35-70

Author(s):

Das ◽

Amrutur ◽

Onodera

Keyword(s):

Gate Delay ◽

Technology Node ◽

Delay Variability ◽

On Chip

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Front Matter

Nano-CMOS and Post-CMOS Electronics: Circuits and Design ◽

10.1049/pbcs030e_fm ◽

2016 ◽

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SPICEless RTL design optimization of nanoelectronic digital integrated circuits

Nano-CMOS and Post-CMOS Electronics: Circuits and Design ◽

10.1049/pbcs030e_ch9 ◽

2016 ◽

pp. 267-304

Author(s):

Kougianos ◽

Mohanty

Keyword(s):

Integrated Circuits ◽

Design Optimization ◽

Digital Integrated Circuits ◽

Rtl Design

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Nano-CMOS and Post-CMOS Electronics: Circuits and DesignLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By Institution Of Engineering And Technology

Thermal effects in carbon nanotube VLSI interconnects

A new paradigm towards performance centric computation beyond CMOS: DNA computing

High-level synthesis of digital integrated circuits in the nanoscale mobile electronics era

Low-leakage techniques for nanoscale CMOS circuits

Lumped electro-thermal modeling and analysis of carbon nanotube interconnects

Data stability and write ability enhancement techniques for FinFET SRAM circuits

Nanoscale FinFET devices for PVT-aware SRAM

On-chip gate delay variability measurement in scaled technology node

Front Matter

SPICEless RTL design optimization of nanoelectronic digital integrated circuits

Nano-CMOS and Post-CMOS Electronics: Circuits and Design
Latest Publications